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1 /** @file NorFlashDxe.h
2
3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __NOR_FLASH_DXE_H__
16 #define __NOR_FLASH_DXE_H__
17
18
19 #include <Base.h>
20 #include <PiDxe.h>
21
22 #include <Protocol/BlockIo.h>
23 #include <Protocol/FirmwareVolumeBlock.h>
24
25 #include <Library/DebugLib.h>
26 #include <Library/IoLib.h>
27 #include <Library/NorFlashPlatformLib.h>
28 #include <Library/UefiLib.h>
29 #include <Library/UefiRuntimeLib.h>
30
31 #define NOR_FLASH_ERASE_RETRY 10
32
33 // Device access macros
34 // These are necessary because we use 2 x 16bit parts to make up 32bit data
35
36 #define HIGH_16_BITS 0xFFFF0000
37 #define LOW_16_BITS 0x0000FFFF
38 #define LOW_8_BITS 0x000000FF
39
40 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
41
42 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
43 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
44
45 // Each command must be sent simultaneously to both chips,
46 // i.e. at the lower 16 bits AND at the higher 16 bits
47 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
48 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
49 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
50 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
51
52 // Status Register Bits
53 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
54 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
55 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
56 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
57 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
58 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
59 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
60 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
61
62 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
63
64 // On chip buffer size for buffered programming operations
65 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
66 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
67 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
68 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
69 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
70 #define BOUNDARY_OF_32_WORDS 0x7F
71
72 // CFI Addresses
73 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
74 #define P30_CFI_ADDR_VENDOR_ID 0x13
75
76 // CFI Data
77 #define CFI_QRY 0x00595251
78
79 // READ Commands
80 #define P30_CMD_READ_DEVICE_ID 0x0090
81 #define P30_CMD_READ_STATUS_REGISTER 0x0070
82 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
83 #define P30_CMD_READ_ARRAY 0x00FF
84 #define P30_CMD_READ_CFI_QUERY 0x0098
85
86 // WRITE Commands
87 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
88 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
89 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
90 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
91 #define P30_CMD_BEFP_SETUP 0x0080
92 #define P30_CMD_BEFP_CONFIRM 0x00D0
93
94 // ERASE Commands
95 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
96 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
97
98 // SUSPEND Commands
99 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
100 #define P30_CMD_SUSPEND_RESUME 0x00D0
101
102 // BLOCK LOCKING / UNLOCKING Commands
103 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
104 #define P30_CMD_LOCK_BLOCK 0x0001
105 #define P30_CMD_UNLOCK_BLOCK 0x00D0
106 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
107
108 // PROTECTION Commands
109 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
110
111 // CONFIGURATION Commands
112 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
113 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
114
115 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
116 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
117 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
118
119 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
120
121 typedef EFI_STATUS (*NOR_FLASH_INITIALIZE) (NOR_FLASH_INSTANCE* Instance);
122
123 typedef struct {
124 VENDOR_DEVICE_PATH Vendor;
125 EFI_DEVICE_PATH_PROTOCOL End;
126 } NOR_FLASH_DEVICE_PATH;
127
128 struct _NOR_FLASH_INSTANCE {
129 UINT32 Signature;
130 EFI_HANDLE Handle;
131
132 BOOLEAN Initialized;
133 NOR_FLASH_INITIALIZE Initialize;
134
135 UINTN DeviceBaseAddress;
136 UINTN RegionBaseAddress;
137 UINTN Size;
138 EFI_LBA StartLba;
139
140 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
141 EFI_BLOCK_IO_MEDIA Media;
142
143 BOOLEAN SupportFvb;
144 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
145 VOID* FvbBuffer;
146
147 NOR_FLASH_DEVICE_PATH DevicePath;
148 };
149
150 EFI_STATUS
151 NorFlashReadCfiData (
152 IN UINTN DeviceBaseAddress,
153 IN UINTN CFI_Offset,
154 IN UINT32 NumberOfBytes,
155 OUT UINT32 *Data
156 );
157
158 EFI_STATUS
159 NorFlashWriteBuffer (
160 IN NOR_FLASH_INSTANCE *Instance,
161 IN UINTN TargetAddress,
162 IN UINTN BufferSizeInBytes,
163 IN UINT32 *Buffer
164 );
165
166 //
167 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
168 //
169 EFI_STATUS
170 EFIAPI
171 NorFlashBlockIoReset (
172 IN EFI_BLOCK_IO_PROTOCOL *This,
173 IN BOOLEAN ExtendedVerification
174 );
175
176 //
177 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
178 //
179 EFI_STATUS
180 EFIAPI
181 NorFlashBlockIoReadBlocks (
182 IN EFI_BLOCK_IO_PROTOCOL *This,
183 IN UINT32 MediaId,
184 IN EFI_LBA Lba,
185 IN UINTN BufferSizeInBytes,
186 OUT VOID *Buffer
187 );
188
189 //
190 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
191 //
192 EFI_STATUS
193 EFIAPI
194 NorFlashBlockIoWriteBlocks (
195 IN EFI_BLOCK_IO_PROTOCOL *This,
196 IN UINT32 MediaId,
197 IN EFI_LBA Lba,
198 IN UINTN BufferSizeInBytes,
199 IN VOID *Buffer
200 );
201
202 //
203 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
204 //
205 EFI_STATUS
206 EFIAPI
207 NorFlashBlockIoFlushBlocks (
208 IN EFI_BLOCK_IO_PROTOCOL *This
209 );
210
211
212 //
213 // NorFlashFvbDxe.c
214 //
215
216 EFI_STATUS
217 EFIAPI
218 NorFlashFvbInitialize (
219 IN NOR_FLASH_INSTANCE* Instance
220 );
221
222 EFI_STATUS
223 EFIAPI
224 FvbGetAttributes(
225 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
226 OUT EFI_FVB_ATTRIBUTES_2 *Attributes
227 );
228
229 EFI_STATUS
230 EFIAPI
231 FvbSetAttributes(
232 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
233 IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
234 );
235
236 EFI_STATUS
237 EFIAPI
238 FvbGetPhysicalAddress(
239 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
240 OUT EFI_PHYSICAL_ADDRESS *Address
241 );
242
243 EFI_STATUS
244 EFIAPI
245 FvbGetBlockSize(
246 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
247 IN EFI_LBA Lba,
248 OUT UINTN *BlockSize,
249 OUT UINTN *NumberOfBlocks
250 );
251
252 EFI_STATUS
253 EFIAPI
254 FvbRead(
255 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
256 IN EFI_LBA Lba,
257 IN UINTN Offset,
258 IN OUT UINTN *NumBytes,
259 IN OUT UINT8 *Buffer
260 );
261
262 EFI_STATUS
263 EFIAPI
264 FvbWrite(
265 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
266 IN EFI_LBA Lba,
267 IN UINTN Offset,
268 IN OUT UINTN *NumBytes,
269 IN UINT8 *Buffer
270 );
271
272 EFI_STATUS
273 EFIAPI
274 FvbEraseBlocks(
275 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
276 ...
277 );
278
279 //
280 // NorFlashDxe.c
281 //
282
283 EFI_STATUS
284 NorFlashUnlockAndEraseSingleBlock (
285 IN NOR_FLASH_INSTANCE *Instance,
286 IN UINTN BlockAddress
287 );
288
289 EFI_STATUS
290 NorFlashWriteSingleBlock (
291 IN NOR_FLASH_INSTANCE *Instance,
292 IN EFI_LBA Lba,
293 IN UINT32 *DataBuffer,
294 IN UINT32 BlockSizeInWords
295 );
296
297 EFI_STATUS
298 NorFlashWriteBlocks (
299 IN NOR_FLASH_INSTANCE *Instance,
300 IN EFI_LBA Lba,
301 IN UINTN BufferSizeInBytes,
302 IN VOID *Buffer
303 );
304
305 EFI_STATUS
306 NorFlashReadBlocks (
307 IN NOR_FLASH_INSTANCE *Instance,
308 IN EFI_LBA Lba,
309 IN UINTN BufferSizeInBytes,
310 OUT VOID *Buffer
311 );
312
313 EFI_STATUS
314 NorFlashReset (
315 IN NOR_FLASH_INSTANCE *Instance
316 );
317
318 #endif /* __NOR_FLASH_DXE_H__ */