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1 /** @file NorFlashDxe.h
2
3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __NOR_FLASH_DXE_H__
16 #define __NOR_FLASH_DXE_H__
17
18
19 #include <Base.h>
20 #include <PiDxe.h>
21
22 #include <Guid/EventGroup.h>
23
24 #include <Protocol/BlockIo.h>
25 #include <Protocol/DiskIo.h>
26 #include <Protocol/FirmwareVolumeBlock.h>
27
28 #include <Library/DebugLib.h>
29 #include <Library/IoLib.h>
30 #include <Library/NorFlashPlatformLib.h>
31 #include <Library/UefiLib.h>
32 #include <Library/UefiRuntimeLib.h>
33
34 #define NOR_FLASH_ERASE_RETRY 10
35
36 // Device access macros
37 // These are necessary because we use 2 x 16bit parts to make up 32bit data
38
39 #define HIGH_16_BITS 0xFFFF0000
40 #define LOW_16_BITS 0x0000FFFF
41 #define LOW_8_BITS 0x000000FF
42
43 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
44
45 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
46 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
47
48 // Each command must be sent simultaneously to both chips,
49 // i.e. at the lower 16 bits AND at the higher 16 bits
50 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
51 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
52 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
53 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
54
55 // Status Register Bits
56 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
57 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
58 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
59 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
60 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
61 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
62 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
63 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
64
65 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
66
67 // On chip buffer size for buffered programming operations
68 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
69 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
70 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
71 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
72 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
73 #define BOUNDARY_OF_32_WORDS 0x7F
74
75 // CFI Addresses
76 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
77 #define P30_CFI_ADDR_VENDOR_ID 0x13
78
79 // CFI Data
80 #define CFI_QRY 0x00595251
81
82 // READ Commands
83 #define P30_CMD_READ_DEVICE_ID 0x0090
84 #define P30_CMD_READ_STATUS_REGISTER 0x0070
85 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
86 #define P30_CMD_READ_ARRAY 0x00FF
87 #define P30_CMD_READ_CFI_QUERY 0x0098
88
89 // WRITE Commands
90 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
91 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
92 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
93 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
94 #define P30_CMD_BEFP_SETUP 0x0080
95 #define P30_CMD_BEFP_CONFIRM 0x00D0
96
97 // ERASE Commands
98 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
99 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
100
101 // SUSPEND Commands
102 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
103 #define P30_CMD_SUSPEND_RESUME 0x00D0
104
105 // BLOCK LOCKING / UNLOCKING Commands
106 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
107 #define P30_CMD_LOCK_BLOCK 0x0001
108 #define P30_CMD_UNLOCK_BLOCK 0x00D0
109 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
110
111 // PROTECTION Commands
112 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
113
114 // CONFIGURATION Commands
115 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
116 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
117
118 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
119 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
120 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
121 #define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)
122
123 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
124
125 typedef struct {
126 VENDOR_DEVICE_PATH Vendor;
127 EFI_DEVICE_PATH_PROTOCOL End;
128 } NOR_FLASH_DEVICE_PATH;
129
130 struct _NOR_FLASH_INSTANCE {
131 UINT32 Signature;
132 EFI_HANDLE Handle;
133
134 UINTN DeviceBaseAddress;
135 UINTN RegionBaseAddress;
136 UINTN Size;
137 EFI_LBA StartLba;
138
139 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
140 EFI_BLOCK_IO_MEDIA Media;
141 EFI_DISK_IO_PROTOCOL DiskIoProtocol;
142
143 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
144 VOID* ShadowBuffer;
145
146 NOR_FLASH_DEVICE_PATH DevicePath;
147 };
148
149 EFI_STATUS
150 NorFlashReadCfiData (
151 IN UINTN DeviceBaseAddress,
152 IN UINTN CFI_Offset,
153 IN UINT32 NumberOfBytes,
154 OUT UINT32 *Data
155 );
156
157 EFI_STATUS
158 NorFlashWriteBuffer (
159 IN NOR_FLASH_INSTANCE *Instance,
160 IN UINTN TargetAddress,
161 IN UINTN BufferSizeInBytes,
162 IN UINT32 *Buffer
163 );
164
165 //
166 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
167 //
168 EFI_STATUS
169 EFIAPI
170 NorFlashBlockIoReset (
171 IN EFI_BLOCK_IO_PROTOCOL *This,
172 IN BOOLEAN ExtendedVerification
173 );
174
175 //
176 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
177 //
178 EFI_STATUS
179 EFIAPI
180 NorFlashBlockIoReadBlocks (
181 IN EFI_BLOCK_IO_PROTOCOL *This,
182 IN UINT32 MediaId,
183 IN EFI_LBA Lba,
184 IN UINTN BufferSizeInBytes,
185 OUT VOID *Buffer
186 );
187
188 //
189 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
190 //
191 EFI_STATUS
192 EFIAPI
193 NorFlashBlockIoWriteBlocks (
194 IN EFI_BLOCK_IO_PROTOCOL *This,
195 IN UINT32 MediaId,
196 IN EFI_LBA Lba,
197 IN UINTN BufferSizeInBytes,
198 IN VOID *Buffer
199 );
200
201 //
202 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
203 //
204 EFI_STATUS
205 EFIAPI
206 NorFlashBlockIoFlushBlocks (
207 IN EFI_BLOCK_IO_PROTOCOL *This
208 );
209
210 //
211 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
212 //
213 EFI_STATUS
214 EFIAPI
215 NorFlashDiskIoReadDisk (
216 IN EFI_DISK_IO_PROTOCOL *This,
217 IN UINT32 MediaId,
218 IN UINT64 Offset,
219 IN UINTN BufferSize,
220 OUT VOID *Buffer
221 );
222
223 //
224 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
225 //
226 EFI_STATUS
227 EFIAPI
228 NorFlashDiskIoWriteDisk (
229 IN EFI_DISK_IO_PROTOCOL *This,
230 IN UINT32 MediaId,
231 IN UINT64 Offset,
232 IN UINTN BufferSize,
233 IN VOID *Buffer
234 );
235
236 //
237 // NorFlashFvbDxe.c
238 //
239
240 EFI_STATUS
241 EFIAPI
242 NorFlashFvbInitialize (
243 IN NOR_FLASH_INSTANCE* Instance
244 );
245
246 EFI_STATUS
247 EFIAPI
248 FvbGetAttributes(
249 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
250 OUT EFI_FVB_ATTRIBUTES_2 *Attributes
251 );
252
253 EFI_STATUS
254 EFIAPI
255 FvbSetAttributes(
256 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
257 IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
258 );
259
260 EFI_STATUS
261 EFIAPI
262 FvbGetPhysicalAddress(
263 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
264 OUT EFI_PHYSICAL_ADDRESS *Address
265 );
266
267 EFI_STATUS
268 EFIAPI
269 FvbGetBlockSize(
270 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
271 IN EFI_LBA Lba,
272 OUT UINTN *BlockSize,
273 OUT UINTN *NumberOfBlocks
274 );
275
276 EFI_STATUS
277 EFIAPI
278 FvbRead(
279 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
280 IN EFI_LBA Lba,
281 IN UINTN Offset,
282 IN OUT UINTN *NumBytes,
283 IN OUT UINT8 *Buffer
284 );
285
286 EFI_STATUS
287 EFIAPI
288 FvbWrite(
289 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
290 IN EFI_LBA Lba,
291 IN UINTN Offset,
292 IN OUT UINTN *NumBytes,
293 IN UINT8 *Buffer
294 );
295
296 EFI_STATUS
297 EFIAPI
298 FvbEraseBlocks(
299 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
300 ...
301 );
302
303 //
304 // NorFlashDxe.c
305 //
306
307 EFI_STATUS
308 NorFlashUnlockAndEraseSingleBlock (
309 IN NOR_FLASH_INSTANCE *Instance,
310 IN UINTN BlockAddress
311 );
312
313 EFI_STATUS
314 NorFlashWriteSingleBlock (
315 IN NOR_FLASH_INSTANCE *Instance,
316 IN EFI_LBA Lba,
317 IN UINTN Offset,
318 IN OUT UINTN *NumBytes,
319 IN UINT8 *Buffer
320 );
321
322 EFI_STATUS
323 NorFlashWriteBlocks (
324 IN NOR_FLASH_INSTANCE *Instance,
325 IN EFI_LBA Lba,
326 IN UINTN BufferSizeInBytes,
327 IN VOID *Buffer
328 );
329
330 EFI_STATUS
331 NorFlashReadBlocks (
332 IN NOR_FLASH_INSTANCE *Instance,
333 IN EFI_LBA Lba,
334 IN UINTN BufferSizeInBytes,
335 OUT VOID *Buffer
336 );
337
338 EFI_STATUS
339 NorFlashRead (
340 IN NOR_FLASH_INSTANCE *Instance,
341 IN EFI_LBA Lba,
342 IN UINTN Offset,
343 IN UINTN BufferSizeInBytes,
344 OUT VOID *Buffer
345 );
346
347 EFI_STATUS
348 NorFlashWrite (
349 IN NOR_FLASH_INSTANCE *Instance,
350 IN EFI_LBA Lba,
351 IN UINTN Offset,
352 IN OUT UINTN *NumBytes,
353 IN UINT8 *Buffer
354 );
355
356 EFI_STATUS
357 NorFlashReset (
358 IN NOR_FLASH_INSTANCE *Instance
359 );
360
361 #endif /* __NOR_FLASH_DXE_H__ */