1 /** @file NorFlashDxe.h
3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __NOR_FLASH_DXE_H__
16 #define __NOR_FLASH_DXE_H__
22 #include <Guid/EventGroup.h>
24 #include <Protocol/BlockIo.h>
25 #include <Protocol/FirmwareVolumeBlock.h>
27 #include <Library/DebugLib.h>
28 #include <Library/IoLib.h>
29 #include <Library/NorFlashPlatformLib.h>
30 #include <Library/UefiLib.h>
31 #include <Library/UefiRuntimeLib.h>
33 #define NOR_FLASH_ERASE_RETRY 10
35 // Device access macros
36 // These are necessary because we use 2 x 16bit parts to make up 32bit data
38 #define HIGH_16_BITS 0xFFFF0000
39 #define LOW_16_BITS 0x0000FFFF
40 #define LOW_8_BITS 0x000000FF
42 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
44 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
45 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
47 // Each command must be sent simultaneously to both chips,
48 // i.e. at the lower 16 bits AND at the higher 16 bits
49 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
50 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
51 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
52 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
54 // Status Register Bits
55 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
56 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
57 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
58 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
59 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
60 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
61 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
62 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
64 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
66 // On chip buffer size for buffered programming operations
67 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
68 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
69 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
70 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
71 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
72 #define BOUNDARY_OF_32_WORDS 0x7F
75 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
76 #define P30_CFI_ADDR_VENDOR_ID 0x13
79 #define CFI_QRY 0x00595251
82 #define P30_CMD_READ_DEVICE_ID 0x0090
83 #define P30_CMD_READ_STATUS_REGISTER 0x0070
84 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
85 #define P30_CMD_READ_ARRAY 0x00FF
86 #define P30_CMD_READ_CFI_QUERY 0x0098
89 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
90 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
91 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
92 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
93 #define P30_CMD_BEFP_SETUP 0x0080
94 #define P30_CMD_BEFP_CONFIRM 0x00D0
97 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
98 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
101 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
102 #define P30_CMD_SUSPEND_RESUME 0x00D0
104 // BLOCK LOCKING / UNLOCKING Commands
105 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
106 #define P30_CMD_LOCK_BLOCK 0x0001
107 #define P30_CMD_UNLOCK_BLOCK 0x00D0
108 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
110 // PROTECTION Commands
111 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
113 // CONFIGURATION Commands
114 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
115 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
117 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
118 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
119 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
121 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE
;
123 typedef EFI_STATUS (*NOR_FLASH_INITIALIZE
) (NOR_FLASH_INSTANCE
* Instance
);
126 VENDOR_DEVICE_PATH Vendor
;
127 EFI_DEVICE_PATH_PROTOCOL End
;
128 } NOR_FLASH_DEVICE_PATH
;
130 struct _NOR_FLASH_INSTANCE
{
135 NOR_FLASH_INITIALIZE Initialize
;
137 UINTN DeviceBaseAddress
;
138 UINTN RegionBaseAddress
;
142 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol
;
143 EFI_BLOCK_IO_MEDIA Media
;
146 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol
;
149 NOR_FLASH_DEVICE_PATH DevicePath
;
153 NorFlashReadCfiData (
154 IN UINTN DeviceBaseAddress
,
156 IN UINT32 NumberOfBytes
,
161 NorFlashWriteBuffer (
162 IN NOR_FLASH_INSTANCE
*Instance
,
163 IN UINTN TargetAddress
,
164 IN UINTN BufferSizeInBytes
,
169 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
173 NorFlashBlockIoReset (
174 IN EFI_BLOCK_IO_PROTOCOL
*This
,
175 IN BOOLEAN ExtendedVerification
179 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
183 NorFlashBlockIoReadBlocks (
184 IN EFI_BLOCK_IO_PROTOCOL
*This
,
187 IN UINTN BufferSizeInBytes
,
192 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
196 NorFlashBlockIoWriteBlocks (
197 IN EFI_BLOCK_IO_PROTOCOL
*This
,
200 IN UINTN BufferSizeInBytes
,
205 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
209 NorFlashBlockIoFlushBlocks (
210 IN EFI_BLOCK_IO_PROTOCOL
*This
220 NorFlashFvbInitialize (
221 IN NOR_FLASH_INSTANCE
* Instance
227 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
228 OUT EFI_FVB_ATTRIBUTES_2
*Attributes
234 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
235 IN OUT EFI_FVB_ATTRIBUTES_2
*Attributes
240 FvbGetPhysicalAddress(
241 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
242 OUT EFI_PHYSICAL_ADDRESS
*Address
248 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
250 OUT UINTN
*BlockSize
,
251 OUT UINTN
*NumberOfBlocks
257 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
260 IN OUT UINTN
*NumBytes
,
267 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
270 IN OUT UINTN
*NumBytes
,
277 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
286 NorFlashUnlockAndEraseSingleBlock (
287 IN NOR_FLASH_INSTANCE
*Instance
,
288 IN UINTN BlockAddress
292 NorFlashWriteSingleBlock (
293 IN NOR_FLASH_INSTANCE
*Instance
,
295 IN UINT32
*DataBuffer
,
296 IN UINT32 BlockSizeInWords
300 NorFlashWriteBlocks (
301 IN NOR_FLASH_INSTANCE
*Instance
,
303 IN UINTN BufferSizeInBytes
,
308 NorFlashWriteSingleWord (
309 IN NOR_FLASH_INSTANCE
*Instance
,
310 IN UINTN WordAddress
,
316 IN NOR_FLASH_INSTANCE
*Instance
,
318 IN UINTN BufferSizeInBytes
,
324 IN NOR_FLASH_INSTANCE
*Instance
,
327 IN UINTN BufferSizeInBytes
,
333 IN NOR_FLASH_INSTANCE
*Instance
337 NorFlashUnlockSingleBlockIfNecessary (
338 IN NOR_FLASH_INSTANCE
*Instance
,
339 IN UINTN BlockAddress
342 #endif /* __NOR_FLASH_DXE_H__ */