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ArmPlatformPkg/NorFlashDxe: use one GUID plus index to identify flash banks
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1 /** @file NorFlashDxe.h
2
3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __NOR_FLASH_DXE_H__
16 #define __NOR_FLASH_DXE_H__
17
18
19 #include <Base.h>
20 #include <PiDxe.h>
21
22 #include <Guid/EventGroup.h>
23
24 #include <Protocol/BlockIo.h>
25 #include <Protocol/DiskIo.h>
26 #include <Protocol/FirmwareVolumeBlock.h>
27
28 #include <Library/DebugLib.h>
29 #include <Library/IoLib.h>
30 #include <Library/NorFlashPlatformLib.h>
31 #include <Library/UefiLib.h>
32 #include <Library/UefiRuntimeLib.h>
33
34 #define NOR_FLASH_ERASE_RETRY 10
35
36 // Device access macros
37 // These are necessary because we use 2 x 16bit parts to make up 32bit data
38
39 #define HIGH_16_BITS 0xFFFF0000
40 #define LOW_16_BITS 0x0000FFFF
41 #define LOW_8_BITS 0x000000FF
42
43 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
44
45 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
46 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
47
48 // Each command must be sent simultaneously to both chips,
49 // i.e. at the lower 16 bits AND at the higher 16 bits
50 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
51 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
52 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
53 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
54
55 // Status Register Bits
56 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
57 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
58 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
59 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
60 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
61 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
62 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
63 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
64
65 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
66
67 // On chip buffer size for buffered programming operations
68 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
69 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
70 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
71 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
72 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
73 #define BOUNDARY_OF_32_WORDS 0x7F
74
75 // CFI Addresses
76 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
77 #define P30_CFI_ADDR_VENDOR_ID 0x13
78
79 // CFI Data
80 #define CFI_QRY 0x00595251
81
82 // READ Commands
83 #define P30_CMD_READ_DEVICE_ID 0x0090
84 #define P30_CMD_READ_STATUS_REGISTER 0x0070
85 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
86 #define P30_CMD_READ_ARRAY 0x00FF
87 #define P30_CMD_READ_CFI_QUERY 0x0098
88
89 // WRITE Commands
90 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
91 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
92 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
93 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
94 #define P30_CMD_BEFP_SETUP 0x0080
95 #define P30_CMD_BEFP_CONFIRM 0x00D0
96
97 // ERASE Commands
98 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
99 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
100
101 // SUSPEND Commands
102 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
103 #define P30_CMD_SUSPEND_RESUME 0x00D0
104
105 // BLOCK LOCKING / UNLOCKING Commands
106 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
107 #define P30_CMD_LOCK_BLOCK 0x0001
108 #define P30_CMD_UNLOCK_BLOCK 0x00D0
109 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
110
111 // PROTECTION Commands
112 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
113
114 // CONFIGURATION Commands
115 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
116 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
117
118 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
119 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
120 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
121 #define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)
122
123 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
124
125 #pragma pack (1)
126 typedef struct {
127 VENDOR_DEVICE_PATH Vendor;
128 UINT8 Index;
129 EFI_DEVICE_PATH_PROTOCOL End;
130 } NOR_FLASH_DEVICE_PATH;
131 #pragma pack ()
132
133 struct _NOR_FLASH_INSTANCE {
134 UINT32 Signature;
135 EFI_HANDLE Handle;
136
137 UINTN DeviceBaseAddress;
138 UINTN RegionBaseAddress;
139 UINTN Size;
140 EFI_LBA StartLba;
141
142 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
143 EFI_BLOCK_IO_MEDIA Media;
144 EFI_DISK_IO_PROTOCOL DiskIoProtocol;
145
146 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
147 VOID* ShadowBuffer;
148
149 NOR_FLASH_DEVICE_PATH DevicePath;
150 };
151
152 EFI_STATUS
153 NorFlashReadCfiData (
154 IN UINTN DeviceBaseAddress,
155 IN UINTN CFI_Offset,
156 IN UINT32 NumberOfBytes,
157 OUT UINT32 *Data
158 );
159
160 EFI_STATUS
161 NorFlashWriteBuffer (
162 IN NOR_FLASH_INSTANCE *Instance,
163 IN UINTN TargetAddress,
164 IN UINTN BufferSizeInBytes,
165 IN UINT32 *Buffer
166 );
167
168 //
169 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
170 //
171 EFI_STATUS
172 EFIAPI
173 NorFlashBlockIoReset (
174 IN EFI_BLOCK_IO_PROTOCOL *This,
175 IN BOOLEAN ExtendedVerification
176 );
177
178 //
179 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
180 //
181 EFI_STATUS
182 EFIAPI
183 NorFlashBlockIoReadBlocks (
184 IN EFI_BLOCK_IO_PROTOCOL *This,
185 IN UINT32 MediaId,
186 IN EFI_LBA Lba,
187 IN UINTN BufferSizeInBytes,
188 OUT VOID *Buffer
189 );
190
191 //
192 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
193 //
194 EFI_STATUS
195 EFIAPI
196 NorFlashBlockIoWriteBlocks (
197 IN EFI_BLOCK_IO_PROTOCOL *This,
198 IN UINT32 MediaId,
199 IN EFI_LBA Lba,
200 IN UINTN BufferSizeInBytes,
201 IN VOID *Buffer
202 );
203
204 //
205 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
206 //
207 EFI_STATUS
208 EFIAPI
209 NorFlashBlockIoFlushBlocks (
210 IN EFI_BLOCK_IO_PROTOCOL *This
211 );
212
213 //
214 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
215 //
216 EFI_STATUS
217 EFIAPI
218 NorFlashDiskIoReadDisk (
219 IN EFI_DISK_IO_PROTOCOL *This,
220 IN UINT32 MediaId,
221 IN UINT64 Offset,
222 IN UINTN BufferSize,
223 OUT VOID *Buffer
224 );
225
226 //
227 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
228 //
229 EFI_STATUS
230 EFIAPI
231 NorFlashDiskIoWriteDisk (
232 IN EFI_DISK_IO_PROTOCOL *This,
233 IN UINT32 MediaId,
234 IN UINT64 Offset,
235 IN UINTN BufferSize,
236 IN VOID *Buffer
237 );
238
239 //
240 // NorFlashFvbDxe.c
241 //
242
243 EFI_STATUS
244 EFIAPI
245 NorFlashFvbInitialize (
246 IN NOR_FLASH_INSTANCE* Instance
247 );
248
249 EFI_STATUS
250 EFIAPI
251 FvbGetAttributes(
252 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
253 OUT EFI_FVB_ATTRIBUTES_2 *Attributes
254 );
255
256 EFI_STATUS
257 EFIAPI
258 FvbSetAttributes(
259 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
260 IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
261 );
262
263 EFI_STATUS
264 EFIAPI
265 FvbGetPhysicalAddress(
266 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
267 OUT EFI_PHYSICAL_ADDRESS *Address
268 );
269
270 EFI_STATUS
271 EFIAPI
272 FvbGetBlockSize(
273 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
274 IN EFI_LBA Lba,
275 OUT UINTN *BlockSize,
276 OUT UINTN *NumberOfBlocks
277 );
278
279 EFI_STATUS
280 EFIAPI
281 FvbRead(
282 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
283 IN EFI_LBA Lba,
284 IN UINTN Offset,
285 IN OUT UINTN *NumBytes,
286 IN OUT UINT8 *Buffer
287 );
288
289 EFI_STATUS
290 EFIAPI
291 FvbWrite(
292 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
293 IN EFI_LBA Lba,
294 IN UINTN Offset,
295 IN OUT UINTN *NumBytes,
296 IN UINT8 *Buffer
297 );
298
299 EFI_STATUS
300 EFIAPI
301 FvbEraseBlocks(
302 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
303 ...
304 );
305
306 //
307 // NorFlashDxe.c
308 //
309
310 EFI_STATUS
311 NorFlashUnlockAndEraseSingleBlock (
312 IN NOR_FLASH_INSTANCE *Instance,
313 IN UINTN BlockAddress
314 );
315
316 EFI_STATUS
317 NorFlashWriteSingleBlock (
318 IN NOR_FLASH_INSTANCE *Instance,
319 IN EFI_LBA Lba,
320 IN UINTN Offset,
321 IN OUT UINTN *NumBytes,
322 IN UINT8 *Buffer
323 );
324
325 EFI_STATUS
326 NorFlashWriteBlocks (
327 IN NOR_FLASH_INSTANCE *Instance,
328 IN EFI_LBA Lba,
329 IN UINTN BufferSizeInBytes,
330 IN VOID *Buffer
331 );
332
333 EFI_STATUS
334 NorFlashReadBlocks (
335 IN NOR_FLASH_INSTANCE *Instance,
336 IN EFI_LBA Lba,
337 IN UINTN BufferSizeInBytes,
338 OUT VOID *Buffer
339 );
340
341 EFI_STATUS
342 NorFlashRead (
343 IN NOR_FLASH_INSTANCE *Instance,
344 IN EFI_LBA Lba,
345 IN UINTN Offset,
346 IN UINTN BufferSizeInBytes,
347 OUT VOID *Buffer
348 );
349
350 EFI_STATUS
351 NorFlashWrite (
352 IN NOR_FLASH_INSTANCE *Instance,
353 IN EFI_LBA Lba,
354 IN UINTN Offset,
355 IN OUT UINTN *NumBytes,
356 IN UINT8 *Buffer
357 );
358
359 EFI_STATUS
360 NorFlashReset (
361 IN NOR_FLASH_INSTANCE *Instance
362 );
363
364 #endif /* __NOR_FLASH_DXE_H__ */