2 Serial I/O Port library functions with no library constructor/destructor
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/DebugLib.h>
18 #include <Library/IoLib.h>
19 #include <Library/PcdLib.h>
21 #include <Drivers/PL011Uart.h>
25 Initialise the serial port to the specified settings.
26 All unspecified settings will be set to the default values.
28 @return Always return EFI_SUCCESS or EFI_INVALID_PARAMETER.
33 PL011UartInitializePort (
34 IN OUT UINTN UartBase
,
35 IN OUT UINT64
*BaudRate
,
36 IN OUT UINT32
*ReceiveFifoDepth
,
37 IN OUT EFI_PARITY_TYPE
*Parity
,
38 IN OUT UINT8
*DataBits
,
39 IN OUT EFI_STOP_BITS_TYPE
*StopBits
47 // The PL011 supports a buffer of either 1 or 32 chars. Therefore we can accept
48 // 1 char buffer as the minimum fifo size. Because everything can be rounded down,
49 // there is no maximum fifo size.
50 if ((*ReceiveFifoDepth
== 0) || (*ReceiveFifoDepth
>= 32)) {
51 LineControl
|= PL011_UARTLCR_H_FEN
;
52 *ReceiveFifoDepth
= 32;
54 ASSERT (*ReceiveFifoDepth
< 32);
55 // Nothing else to do. 1 byte fifo is default.
56 *ReceiveFifoDepth
= 1;
66 // Nothing to do. Parity is disabled by default.
69 LineControl
|= (PL011_UARTLCR_H_PEN
| PL011_UARTLCR_H_EPS
);
72 LineControl
|= PL011_UARTLCR_H_PEN
;
75 LineControl
|= (PL011_UARTLCR_H_PEN
| PL011_UARTLCR_H_SPS
| PL011_UARTLCR_H_EPS
);
78 LineControl
|= (PL011_UARTLCR_H_PEN
| PL011_UARTLCR_H_SPS
);
81 return RETURN_INVALID_PARAMETER
;
91 LineControl
|= PL011_UARTLCR_H_WLEN_8
;
94 LineControl
|= PL011_UARTLCR_H_WLEN_7
;
97 LineControl
|= PL011_UARTLCR_H_WLEN_6
;
100 LineControl
|= PL011_UARTLCR_H_WLEN_5
;
103 return RETURN_INVALID_PARAMETER
;
110 case DefaultStopBits
:
111 *StopBits
= OneStopBit
;
113 // Nothing to do. One stop bit is enabled by default.
116 LineControl
|= PL011_UARTLCR_H_STP2
;
118 case OneFiveStopBits
:
119 // Only 1 or 2 stops bits are supported
121 return RETURN_INVALID_PARAMETER
;
124 // Don't send the LineControl value to the PL011 yet,
125 // wait until after the Baud Rate setting.
126 // This ensures we do not mess up the UART settings halfway through
127 // in the rare case when there is an error with the Baud Rate.
133 // If BaudRate is zero then use default baud rate
135 if (PcdGet32 (PL011UartInteger
) != 0) {
136 MmioWrite32 (UartBase
+ UARTIBRD
, PcdGet32 (PL011UartInteger
));
137 MmioWrite32 (UartBase
+ UARTFBRD
, PcdGet32 (PL011UartFractional
));
139 *BaudRate
= PcdGet32 (PcdSerialBaudRate
);
140 ASSERT (*BaudRate
!= 0);
144 // If BaudRate != 0 then we must calculate the divisor from the value
145 if (*BaudRate
!= 0) {
146 Divisor
= (PcdGet32 (PL011UartClkInHz
) * 4) / *BaudRate
;
147 MmioWrite32 (UartBase
+ UARTIBRD
, Divisor
>> 6);
148 MmioWrite32 (UartBase
+ UARTFBRD
, Divisor
& 0x3F);
151 // No parity, 1 stop, no fifo, 8 data bits
152 MmioWrite32 (UartBase
+ UARTLCR_H
, LineControl
);
154 // Clear any pending errors
155 MmioWrite32 (UartBase
+ UARTECR
, 0);
157 // Enable tx, rx, and uart overall
158 MmioWrite32 (UartBase
+ UARTCR
, PL011_UARTCR_RXE
| PL011_UARTCR_TXE
| PL011_UARTCR_UARTEN
);
160 return RETURN_SUCCESS
;
164 Set the serial device control bits.
166 @param UartBase The base address of the PL011 UART.
167 @param Control Control bits which are to be set on the serial device.
169 @retval EFI_SUCCESS The new control bits were set on the serial device.
170 @retval EFI_UNSUPPORTED The serial device does not support this operation.
171 @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
176 PL011UartSetControl (
182 UINT32 ValidControlBits
;
184 ValidControlBits
= ( EFI_SERIAL_REQUEST_TO_SEND
185 | EFI_SERIAL_DATA_TERMINAL_READY
186 // | EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE // Not implemented yet.
187 // | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE // Not implemented yet.
188 | EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
191 if (Control
& (~ValidControlBits
)) {
192 return EFI_UNSUPPORTED
;
195 Bits
= MmioRead32 (UartBase
+ UARTCR
);
197 if (Control
& EFI_SERIAL_REQUEST_TO_SEND
) {
198 Bits
|= PL011_UARTCR_RTS
;
201 if (Control
& EFI_SERIAL_DATA_TERMINAL_READY
) {
202 Bits
|= PL011_UARTCR_DTR
;
205 if (Control
& EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
) {
206 Bits
|= PL011_UARTCR_LBE
;
209 if (Control
& EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
) {
210 Bits
|= (PL011_UARTCR_CTSEN
& PL011_UARTCR_RTSEN
);
213 MmioWrite32 (UartBase
+ UARTCR
, Bits
);
215 return RETURN_SUCCESS
;
219 Get the serial device control bits.
221 @param UartBase The base address of the PL011 UART.
222 @param Control Control signals read from the serial device.
224 @retval EFI_SUCCESS The control bits were read from the serial device.
225 @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
230 PL011UartGetControl (
236 UINT32 ControlRegister
;
239 FlagRegister
= MmioRead32 (UartBase
+ UARTFR
);
240 ControlRegister
= MmioRead32 (UartBase
+ UARTCR
);
244 if ((FlagRegister
& PL011_UARTFR_CTS
) == PL011_UARTFR_CTS
) {
245 *Control
|= EFI_SERIAL_CLEAR_TO_SEND
;
248 if ((FlagRegister
& PL011_UARTFR_DSR
) == PL011_UARTFR_DSR
) {
249 *Control
|= EFI_SERIAL_DATA_SET_READY
;
252 if ((FlagRegister
& PL011_UARTFR_RI
) == PL011_UARTFR_RI
) {
253 *Control
|= EFI_SERIAL_RING_INDICATE
;
256 if ((FlagRegister
& PL011_UARTFR_DCD
) == PL011_UARTFR_DCD
) {
257 *Control
|= EFI_SERIAL_CARRIER_DETECT
;
260 if ((ControlRegister
& PL011_UARTCR_RTS
) == PL011_UARTCR_RTS
) {
261 *Control
|= EFI_SERIAL_REQUEST_TO_SEND
;
264 if ((ControlRegister
& PL011_UARTCR_DTR
) == PL011_UARTCR_DTR
) {
265 *Control
|= EFI_SERIAL_DATA_TERMINAL_READY
;
268 if ((FlagRegister
& PL011_UARTFR_RXFE
) == PL011_UARTFR_RXFE
) {
269 *Control
|= EFI_SERIAL_INPUT_BUFFER_EMPTY
;
272 if ((FlagRegister
& PL011_UARTFR_TXFE
) == PL011_UARTFR_TXFE
) {
273 *Control
|= EFI_SERIAL_OUTPUT_BUFFER_EMPTY
;
276 if ((ControlRegister
& (PL011_UARTCR_CTSEN
| PL011_UARTCR_RTSEN
)) == (PL011_UARTCR_CTSEN
| PL011_UARTCR_RTSEN
)) {
277 *Control
|= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
;
281 // ToDo: Implement EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
282 if ((ControlRegister
& PL011_UARTCR_LBE
) == PL011_UARTCR_LBE
) {
283 *Control
|= EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
;
286 // ToDo: Implement EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE
287 if (SoftwareLoopbackEnable
) {
288 *Control
|= EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE
;
292 return RETURN_SUCCESS
;
296 Write data to serial device.
298 @param Buffer Point of data buffer which need to be written.
299 @param NumberOfBytes Number of output bytes which are cached in Buffer.
301 @retval 0 Write data failed.
302 @retval !0 Actual number of bytes written to serial device.
310 IN UINTN NumberOfBytes
313 UINT8
* CONST Final
= &Buffer
[NumberOfBytes
];
315 while (Buffer
< Final
) {
316 // Wait until UART able to accept another char
317 while ((MmioRead32 (UartBase
+ UARTFR
) & UART_TX_FULL_FLAG_MASK
));
319 MmioWrite8 (UartBase
+ UARTDR
, *Buffer
++);
322 return NumberOfBytes
;
326 Read data from serial device and save the data in buffer.
328 @param Buffer Point of data buffer which need to be written.
329 @param NumberOfBytes Number of output bytes which are cached in Buffer.
331 @retval 0 Read data failed.
332 @retval !0 Actual number of bytes read from serial device.
340 IN UINTN NumberOfBytes
345 for (Count
= 0; Count
< NumberOfBytes
; Count
++, Buffer
++) {
346 while ((MmioRead32 (UartBase
+ UARTFR
) & UART_RX_EMPTY_FLAG_MASK
) != 0);
347 *Buffer
= MmioRead8 (UartBase
+ UARTDR
);
350 return NumberOfBytes
;
354 Check to see if any data is available to be read from the debug device.
356 @retval EFI_SUCCESS At least one byte of data is available to be read
357 @retval EFI_NOT_READY No data is available to be read
358 @retval EFI_DEVICE_ERROR The serial device is not functioning properly
367 return ((MmioRead32 (UartBase
+ UARTFR
) & UART_RX_EMPTY_FLAG_MASK
) == 0);