3 * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
4 * Copyright (c) 2018, Linaro Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/BaseLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/IoLib.h>
23 #include <Library/UefiBootServicesTableLib.h>
25 #include <Protocol/WatchdogTimer.h>
27 #include "SP805Watchdog.h"
29 STATIC EFI_EVENT mEfiExitBootServicesEvent
;
32 Make sure the SP805 registers are unlocked for writing.
34 Note: The SP805 Watchdog Timer supports locking of its registers,
35 i.e. it inhibits all writes to avoid rogue software accidentally
36 corrupting their contents.
44 if (MmioRead32 (SP805_WDOG_LOCK_REG
) == SP805_WDOG_LOCK_IS_LOCKED
) {
45 MmioWrite32 (SP805_WDOG_LOCK_REG
, SP805_WDOG_SPECIAL_UNLOCK_CODE
);
50 Make sure the SP805 registers are locked and can not be overwritten.
52 Note: The SP805 Watchdog Timer supports locking of its registers,
53 i.e. it inhibits all writes to avoid rogue software accidentally
54 corrupting their contents.
62 if (MmioRead32 (SP805_WDOG_LOCK_REG
) == SP805_WDOG_LOCK_IS_UNLOCKED
) {
63 // To lock it, just write in any number (except the special unlock code).
64 MmioWrite32 (SP805_WDOG_LOCK_REG
, SP805_WDOG_LOCK_IS_LOCKED
);
69 Stop the SP805 watchdog timer from counting down by disabling interrupts.
78 if ((MmioRead32 (SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) != 0) {
79 MmioAnd32 (SP805_WDOG_CONTROL_REG
, ~SP805_WDOG_CTRL_INTEN
);
84 Starts the SP805 counting down by enabling interrupts.
85 The count down will start from the value stored in the Load register,
86 not from the value where it was previously stopped.
95 if ((MmioRead32 (SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) == 0) {
96 MmioOr32 (SP805_WDOG_CONTROL_REG
, SP805_WDOG_CTRL_INTEN
);
101 On exiting boot services we must make sure the SP805 Watchdog Timer
107 ExitBootServicesEvent (
118 This function registers the handler NotifyFunction so it is called every time
119 the watchdog timer expires. It also passes the amount of time since the last
120 handler call to the NotifyFunction.
121 If NotifyFunction is not NULL and a handler is not already registered,
122 then the new handler is registered and EFI_SUCCESS is returned.
123 If NotifyFunction is NULL, and a handler is already registered,
124 then that handler is unregistered.
125 If an attempt is made to register a handler when a handler is already registered,
126 then EFI_ALREADY_STARTED is returned.
127 If an attempt is made to unregister a handler when a handler is not registered,
128 then EFI_INVALID_PARAMETER is returned.
130 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
131 @param NotifyFunction The function to call when a timer interrupt fires. This
132 function executes at TPL_HIGH_LEVEL. The DXE Core will
133 register a handler for the timer interrupt, so it can know
134 how much time has passed. This information is used to
135 signal timer based events. NULL will unregister the handler.
137 @retval EFI_SUCCESS The watchdog timer handler was registered.
138 @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
140 @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
141 previously registered.
147 SP805RegisterHandler (
148 IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
149 IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
152 // ERROR: This function is not supported.
153 // The hardware watchdog will reset the board
154 return EFI_INVALID_PARAMETER
;
159 This function adjusts the period of timer interrupts to the value specified
160 by TimerPeriod. If the timer period is updated, then the selected timer
161 period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
162 the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
163 If an error occurs while attempting to update the timer period, then the
164 timer hardware will be put back in its state prior to this call, and
165 EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
166 is disabled. This is not the same as disabling the CPU's interrupts.
167 Instead, it must either turn off the timer hardware, or it must adjust the
168 interrupt controller so that a CPU interrupt is not generated when the timer
171 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
172 @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
173 the timer hardware is not programmable, then EFI_UNSUPPORTED is
174 returned. If the timer is programmable, then the timer period
175 will be rounded up to the nearest timer period that is supported
176 by the timer hardware. If TimerPeriod is set to 0, then the
177 timer interrupts will be disabled.
180 @retval EFI_SUCCESS The timer period was changed.
181 @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
182 @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
188 SP805SetTimerPeriod (
189 IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
190 IN UINT64 TimerPeriod
// In 100ns units
198 Status
= EFI_SUCCESS
;
200 if (TimerPeriod
== 0) {
201 // This is a watchdog stop request
204 // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
205 // The SP805 will count down to ZERO once, generate an interrupt and
206 // then it will again reload the initial value and start again.
207 // On the second time when it reaches ZERO, it will actually reset the board.
208 // Therefore, we need to load half the required delay.
210 // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
214 // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
216 Ticks64bit
= MultU64x32 (TimerPeriod
, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz
));
217 Ticks64bit
= DivU64x32 (Ticks64bit
, 20000000);
219 // The registers in the SP805 are only 32 bits
220 if (Ticks64bit
> MAX_UINT32
) {
221 // We could load the watchdog with the maximum supported value but
222 // if a smaller value was requested, this could have the watchdog
223 // triggering before it was intended.
224 // Better generate an error to let the caller know.
225 Status
= EFI_DEVICE_ERROR
;
229 // Update the watchdog with a 32-bit value.
230 MmioWrite32 (SP805_WDOG_LOAD_REG
, (UINT32
)Ticks64bit
);
232 // Start the watchdog
237 // Ensure the watchdog is locked before exiting.
243 This function retrieves the period of timer interrupts in 100 ns units,
244 returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
245 is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
246 returned, then the timer is currently disabled.
248 @param This The EFI_TIMER_ARCH_PROTOCOL instance.
249 @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
250 0 is returned, then the timer is currently disabled.
253 @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
254 @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
260 SP805GetTimerPeriod (
261 IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL
*This
,
262 OUT UINT64
*TimerPeriod
267 if (TimerPeriod
== NULL
) {
268 return EFI_INVALID_PARAMETER
;
271 // Check if the watchdog is stopped
272 if ((MmioRead32 (SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_INTEN
) == 0) {
273 // It is stopped, so return zero.
276 // Convert the Watchdog ticks into TimerPeriod
277 // Ensure 64bit arithmetic throughout because the Watchdog ticks may already
278 // be at the maximum 32 bit value and we still need to multiply that by 600.
279 ReturnValue
= MultU64x32 (MmioRead32 (SP805_WDOG_LOAD_REG
), 600);
282 *TimerPeriod
= ReturnValue
;
288 Interface structure for the Watchdog Architectural Protocol.
290 @par Protocol Description:
291 This protocol provides a service to set the amount of time to wait
292 before firing the watchdog timer, and it also provides a service to
293 register a handler that is invoked when the watchdog timer fires.
295 @par When the watchdog timer fires, control will be passed to a handler
296 if one has been registered. If no handler has been registered,
297 or the registered handler returns, then the system will be
298 reset by calling the Runtime Service ResetSystem().
300 @param RegisterHandler
301 Registers a handler that will be called each time the
302 watchdogtimer interrupt fires. TimerPeriod defines the minimum
303 time between timer interrupts, so TimerPeriod will also
304 be the minimum time between calls to the registered
306 NOTE: If the watchdog resets the system in hardware, then
307 this function will not have any chance of executing.
309 @param SetTimerPeriod
310 Sets the period of the timer interrupt in 100 nS units.
311 This function is optional, and may return EFI_UNSUPPORTED.
312 If this function is supported, then the timer period will
313 be rounded up to the nearest supported timer period.
315 @param GetTimerPeriod
316 Retrieves the period of the timer interrupt in 100 nS units.
319 STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer
= {
320 SP805RegisterHandler
,
326 Initialize the state information for the Watchdog Timer Architectural Protocol.
328 @param ImageHandle of the loaded driver
329 @param SystemTable Pointer to the System Table
331 @retval EFI_SUCCESS Protocol registered
332 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
333 @retval EFI_DEVICE_ERROR Hardware problems
339 IN EFI_HANDLE ImageHandle
,
340 IN EFI_SYSTEM_TABLE
*SystemTable
346 // Unlock access to the SP805 registers
349 // Stop the watchdog from triggering unexpectedly
352 // Set the watchdog to reset the board when triggered
353 if ((MmioRead32 (SP805_WDOG_CONTROL_REG
) & SP805_WDOG_CTRL_RESEN
) == 0) {
354 MmioOr32 (SP805_WDOG_CONTROL_REG
, SP805_WDOG_CTRL_RESEN
);
357 // Prohibit any rogue access to SP805 registers
361 // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
362 // This will avoid conflicts with the universal watchdog
364 ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL
, &gEfiWatchdogTimerArchProtocolGuid
);
366 // Register for an ExitBootServicesEvent
367 Status
= gBS
->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES
, TPL_NOTIFY
,
368 ExitBootServicesEvent
, NULL
, &mEfiExitBootServicesEvent
);
369 if (EFI_ERROR (Status
)) {
370 Status
= EFI_OUT_OF_RESOURCES
;
374 // Install the Timer Architectural Protocol onto a new handle
376 Status
= gBS
->InstallMultipleProtocolInterfaces (
378 &gEfiWatchdogTimerArchProtocolGuid
, &mWatchdogTimer
,
381 if (EFI_ERROR (Status
)) {
382 Status
= EFI_OUT_OF_RESOURCES
;
387 ASSERT_EFI_ERROR (Status
);