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[mirror_edk2.git] / ArmPlatformPkg / Drivers / SP805WatchdogDxe / SP805Watchdog.h
1 /** @file
2
3 Copyright (c) 2011-2012, ARM Limited. All rights reserved.
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #ifndef __SP805_WATCHDOG_H__
10 #define __SP805_WATCHDOG_H__
11
12 // SP805 Watchdog Registers
13 #define SP805_WDOG_LOAD_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x000)
14 #define SP805_WDOG_CURRENT_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x004)
15 #define SP805_WDOG_CONTROL_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x008)
16 #define SP805_WDOG_INT_CLR_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x00C)
17 #define SP805_WDOG_RAW_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x010)
18 #define SP805_WDOG_MSK_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x014)
19 #define SP805_WDOG_LOCK_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xC00)
20
21 #define SP805_WDOG_PERIPH_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE0)
22 #define SP805_WDOG_PERIPH_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE4)
23 #define SP805_WDOG_PERIPH_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE8)
24 #define SP805_WDOG_PERIPH_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFEC)
25
26 #define SP805_WDOG_PCELL_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF0)
27 #define SP805_WDOG_PCELL_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF4)
28 #define SP805_WDOG_PCELL_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF8)
29 #define SP805_WDOG_PCELL_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFFC)
30
31 // Timer control register bit definitions
32 #define SP805_WDOG_CTRL_INTEN BIT0
33 #define SP805_WDOG_CTRL_RESEN BIT1
34 #define SP805_WDOG_RAW_INT_STS_WDOGRIS BIT0
35 #define SP805_WDOG_MSK_INT_STS_WDOGMIS BIT0
36
37 #define SP805_WDOG_LOCK_IS_UNLOCKED 0x00000000
38 #define SP805_WDOG_LOCK_IS_LOCKED 0x00000001
39 #define SP805_WDOG_SPECIAL_UNLOCK_CODE 0x1ACCE551
40
41 #endif // __SP805_WATCHDOG_H__