ArmPlatformPkg/Include/Library/LcdPlatformLib.h

   1 /** @file
   2
   3  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
   4  This program and the accompanying materials
   5  are licensed and made available under the terms and conditions of the BSD License
   6  which accompanies this distribution.  The full text of the license may be found at
   7  http://opensource.org/licenses/bsd-license.php
   8
   9  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12  **/
  13
  14 #ifndef __LCDPLATFORMLIB_H
  15 #define __LCDPLATFORMLIB_H
  16
  17 #include <Protocol/GraphicsOutput.h>
  18
  19 #define LCD_VRAM_SIZE                     SIZE_8MB
  20
  21 //
  22 // Modes definitions
  23 //
  24 #define VGA                               0
  25 #define SVGA                              1
  26 #define XGA                               2
  27 #define SXGA                              3
  28 #define UXGA                              4
  29 #define HD                                5
  30
  31 //
  32 // VGA Mode: 640 x 480
  33 //
  34 #define VGA_H_RES_PIXELS                  640
  35 #define VGA_V_RES_PIXELS                  480
  36 #define VGA_OSC_FREQUENCY                 23750000  /* 0x016A6570 */
  37
  38 #define VGA_H_SYNC                        ( 80 - 1)
  39 #define VGA_H_FRONT_PORCH                 ( 16 - 1)
  40 #define VGA_H_BACK_PORCH                  ( 64 - 1)
  41
  42 #define VGA_V_SYNC                        (  4 - 1)
  43 #define VGA_V_FRONT_PORCH                 (  3 - 1)
  44 #define VGA_V_BACK_PORCH                  ( 13 - 1)
  45
  46 //
  47 // SVGA Mode: 800 x 600
  48 //
  49 #define SVGA_H_RES_PIXELS                 800
  50 #define SVGA_V_RES_PIXELS                 600
  51 #define SVGA_OSC_FREQUENCY                38250000  /* 0x0247A610 */
  52
  53 #define SVGA_H_SYNC                       ( 80 - 1)
  54 #define SVGA_H_FRONT_PORCH                ( 32 - 1)
  55 #define SVGA_H_BACK_PORCH                 (112 - 1)
  56
  57 #define SVGA_V_SYNC                       (  4 - 1)
  58 #define SVGA_V_FRONT_PORCH                (  3 - 1)
  59 #define SVGA_V_BACK_PORCH                 ( 17 - 1)
  60
  61 //
  62 // XGA Mode: 1024 x 768
  63 //
  64 #define XGA_H_RES_PIXELS                  1024
  65 #define XGA_V_RES_PIXELS                  768
  66 #define XGA_OSC_FREQUENCY                 63500000  /* 0x03C8EEE0 */
  67
  68 #define XGA_H_SYNC                        (104 - 1)
  69 #define XGA_H_FRONT_PORCH                 ( 48 - 1)
  70 #define XGA_H_BACK_PORCH                  (152 - 1)
  71
  72 #define XGA_V_SYNC                        (  4 - 1)
  73 #define XGA_V_FRONT_PORCH                 (  3 - 1)
  74 #define XGA_V_BACK_PORCH                  ( 23 - 1)
  75
  76 //
  77 // SXGA Mode: 1280 x 1024
  78 //
  79 #define SXGA_H_RES_PIXELS                 1280
  80 #define SXGA_V_RES_PIXELS                 1024
  81 #define SXGA_OSC_FREQUENCY                109000000  /* 0x067F3540 */
  82
  83 #define SXGA_H_SYNC                       (136 - 1)
  84 #define SXGA_H_FRONT_PORCH                ( 80 - 1)
  85 #define SXGA_H_BACK_PORCH                 (216 - 1)
  86
  87 #define SXGA_V_SYNC                       (  7 - 1)
  88 #define SXGA_V_FRONT_PORCH                (  3 - 1)
  89 #define SXGA_V_BACK_PORCH                 ( 29 - 1)
  90
  91 //
  92 // UXGA Mode: 1600 x 1200
  93 //
  94 #define UXGA_H_RES_PIXELS                 1600
  95 #define UXGA_V_RES_PIXELS                 1200
  96 #define UXGA_OSC_FREQUENCY                161000000  /* 0x0998AA40 */
  97
  98 #define UXGA_H_SYNC                       (168 - 1)
  99 #define UXGA_H_FRONT_PORCH                (112 - 1)
 100 #define UXGA_H_BACK_PORCH                 (280 - 1)
 101
 102 #define UXGA_V_SYNC                       (  4 - 1)
 103 #define UXGA_V_FRONT_PORCH                (  3 - 1)
 104 #define UXGA_V_BACK_PORCH                 ( 38 - 1)
 105
 106 //
 107 // HD Mode: 1920 x 1080
 108 //
 109 #define HD_H_RES_PIXELS                   1920
 110 #define HD_V_RES_PIXELS                   1080
 111 #define HD_OSC_FREQUENCY                  173000000  /* 0x0A4FC540 */
 112
 113 #define HD_H_SYNC                         (200 - 1)
 114 #define HD_H_FRONT_PORCH                  (128 - 1)
 115 #define HD_H_BACK_PORCH                   (328 - 1)
 116
 117 #define HD_V_SYNC                         (  5 - 1)
 118 #define HD_V_FRONT_PORCH                  (  3 - 1)
 119 #define HD_V_BACK_PORCH                   ( 32 - 1)
 120
 121 //
 122 // Colour Masks
 123 //
 124
 125 #define LCD_24BPP_RED_MASK              0x00FF0000
 126 #define LCD_24BPP_GREEN_MASK            0x0000FF00
 127 #define LCD_24BPP_BLUE_MASK             0x000000FF
 128 #define LCD_24BPP_RESERVED_MASK         0xFF000000
 129
 130 #define LCD_16BPP_555_RED_MASK          0x00007C00
 131 #define LCD_16BPP_555_GREEN_MASK        0x000003E0
 132 #define LCD_16BPP_555_BLUE_MASK         0x0000001F
 133 #define LCD_16BPP_555_RESERVED_MASK     0x00000000
 134
 135 #define LCD_16BPP_565_RED_MASK          0x0000F800
 136 #define LCD_16BPP_565_GREEN_MASK        0x000007E0
 137 #define LCD_16BPP_565_BLUE_MASK         0x0000001F
 138 #define LCD_16BPP_565_RESERVED_MASK     0x00008000
 139
 140 #define LCD_12BPP_444_RED_MASK          0x00000F00
 141 #define LCD_12BPP_444_GREEN_MASK        0x000000F0
 142 #define LCD_12BPP_444_BLUE_MASK         0x0000000F
 143 #define LCD_12BPP_444_RESERVED_MASK     0x0000F000
 144
 145
 146 // The enumeration indexes maps the PL111 LcdBpp values used in the LCD Control Register
 147 typedef enum {
 148   LCD_BITS_PER_PIXEL_1 = 0,
 149   LCD_BITS_PER_PIXEL_2,
 150   LCD_BITS_PER_PIXEL_4,
 151   LCD_BITS_PER_PIXEL_8,
 152   LCD_BITS_PER_PIXEL_16_555,
 153   LCD_BITS_PER_PIXEL_24,
 154   LCD_BITS_PER_PIXEL_16_565,
 155   LCD_BITS_PER_PIXEL_12_444
 156 } LCD_BPP;
 157
 158
 159 EFI_STATUS
 160 LcdPlatformInitializeDisplay (
 161   IN EFI_HANDLE   Handle
 162   );
 163
 164 EFI_STATUS
 165 LcdPlatformGetVram (
 166   OUT EFI_PHYSICAL_ADDRESS*                 VramBaseAddress,
 167   OUT UINTN*                                VramSize
 168   );
 169
 170 UINT32
 171 LcdPlatformGetMaxMode (
 172   VOID
 173   );
 174
 175 EFI_STATUS
 176 LcdPlatformSetMode (
 177   IN UINT32                                 ModeNumber
 178   );
 179
 180 EFI_STATUS
 181 LcdPlatformQueryMode (
 182   IN  UINT32                                ModeNumber,
 183   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
 184   );
 185
 186 EFI_STATUS
 187 LcdPlatformGetTimings (
 188   IN  UINT32                              ModeNumber,
 189   OUT UINT32*                             HRes,
 190   OUT UINT32*                             HSync,
 191   OUT UINT32*                             HBackPorch,
 192   OUT UINT32*                             HFrontPorch,
 193   OUT UINT32*                             VRes,
 194   OUT UINT32*                             VSync,
 195   OUT UINT32*                             VBackPorch,
 196   OUT UINT32*                             VFrontPorch
 197   );
 198
 199 EFI_STATUS
 200 LcdPlatformGetBpp (
 201   IN  UINT32                                ModeNumber,
 202   OUT LCD_BPP*                              Bpp
 203   );
 204
 205 #endif