ArmPlatformPkg/Include/Library/LcdPlatformLib.h

   1 /** @file
   2
   3  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
   4  This program and the accompanying materials
   5  are licensed and made available under the terms and conditions of the BSD License
   6  which accompanies this distribution.  The full text of the license may be found at
   7  http://opensource.org/licenses/bsd-license.php
   8
   9  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12  **/
  13
  14 #ifndef LCD_PLATFORM_LIB_H_
  15 #define LCD_PLATFORM_LIB_H_
  16
  17 #include <Protocol/GraphicsOutput.h>
  18
  19 #define LCD_VRAM_SIZE                     SIZE_8MB
  20
  21 // Modes definitions
  22 #define VGA                               0
  23 #define SVGA                              1
  24 #define XGA                               2
  25 #define SXGA                              3
  26 #define WSXGA                             4
  27 #define UXGA                              5
  28 #define HD                                6
  29 #define WVGA                              7
  30 #define QHD                               8
  31 #define WSVGA                             9
  32 #define HD720                             10
  33 #define WXGA                              11
  34
  35 // VGA Mode: 640 x 480
  36 #define VGA_H_RES_PIXELS                  640
  37 #define VGA_V_RES_PIXELS                  480
  38 #define VGA_OSC_FREQUENCY                 23750000  /* 0x016A6570 */
  39
  40 #define VGA_H_SYNC                        ( 80 - 1)
  41 #define VGA_H_FRONT_PORCH                 ( 16 - 1)
  42 #define VGA_H_BACK_PORCH                  ( 64 - 1)
  43
  44 #define VGA_V_SYNC                        (  4 - 1)
  45 #define VGA_V_FRONT_PORCH                 (  3 - 1)
  46 #define VGA_V_BACK_PORCH                  ( 13 - 1)
  47
  48 // SVGA Mode: 800 x 600
  49 #define SVGA_H_RES_PIXELS                 800
  50 #define SVGA_V_RES_PIXELS                 600
  51 #define SVGA_OSC_FREQUENCY                38250000  /* 0x0247A610 */
  52
  53 #define SVGA_H_SYNC                       ( 80 - 1)
  54 #define SVGA_H_FRONT_PORCH                ( 32 - 1)
  55 #define SVGA_H_BACK_PORCH                 (112 - 1)
  56
  57 #define SVGA_V_SYNC                       (  4 - 1)
  58 #define SVGA_V_FRONT_PORCH                (  3 - 1)
  59 #define SVGA_V_BACK_PORCH                 ( 17 - 1)
  60
  61 // XGA Mode: 1024 x 768
  62 #define XGA_H_RES_PIXELS                  1024
  63 #define XGA_V_RES_PIXELS                  768
  64 #define XGA_OSC_FREQUENCY                 63500000  /* 0x03C8EEE0 */
  65
  66 #define XGA_H_SYNC                        (104 - 1)
  67 #define XGA_H_FRONT_PORCH                 ( 48 - 1)
  68 #define XGA_H_BACK_PORCH                  (152 - 1)
  69
  70 #define XGA_V_SYNC                        (  4 - 1)
  71 #define XGA_V_FRONT_PORCH                 (  3 - 1)
  72 #define XGA_V_BACK_PORCH                  ( 23 - 1)
  73
  74 // SXGA Mode: 1280 x 1024
  75 #define SXGA_H_RES_PIXELS                 1280
  76 #define SXGA_V_RES_PIXELS                 1024
  77 #define SXGA_OSC_FREQUENCY                109000000  /* 0x067F3540 */
  78
  79 #define SXGA_H_SYNC                       (136 - 1)
  80 #define SXGA_H_FRONT_PORCH                ( 80 - 1)
  81 #define SXGA_H_BACK_PORCH                 (216 - 1)
  82
  83 #define SXGA_V_SYNC                       (  7 - 1)
  84 #define SXGA_V_FRONT_PORCH                (  3 - 1)
  85 #define SXGA_V_BACK_PORCH                 ( 29 - 1)
  86
  87 // WSXGA+ Mode: 1680 x 1050
  88 #define WSXGA_H_RES_PIXELS                1680
  89 #define WSXGA_V_RES_PIXELS                1050
  90 #define WSXGA_OSC_FREQUENCY               147000000  /* 0x08C30AC0 */
  91
  92 #define WSXGA_H_SYNC                      (170 - 1)
  93 #define WSXGA_H_FRONT_PORCH               (104 - 1)
  94 #define WSXGA_H_BACK_PORCH                (274 - 1)
  95
  96 #define WSXGA_V_SYNC                      (  5 - 1)
  97 #define WSXGA_V_FRONT_PORCH               (  4 - 1)
  98 #define WSXGA_V_BACK_PORCH                ( 41 - 1)
  99
 100 // UXGA Mode: 1600 x 1200
 101 #define UXGA_H_RES_PIXELS                 1600
 102 #define UXGA_V_RES_PIXELS                 1200
 103 #define UXGA_OSC_FREQUENCY                161000000  /* 0x0998AA40 */
 104
 105 #define UXGA_H_SYNC                       (168 - 1)
 106 #define UXGA_H_FRONT_PORCH                (112 - 1)
 107 #define UXGA_H_BACK_PORCH                 (280 - 1)
 108
 109 #define UXGA_V_SYNC                       (  4 - 1)
 110 #define UXGA_V_FRONT_PORCH                (  3 - 1)
 111 #define UXGA_V_BACK_PORCH                 ( 38 - 1)
 112
 113 // HD Mode: 1920 x 1080
 114 #define HD_H_RES_PIXELS                   1920
 115 #define HD_V_RES_PIXELS                   1080
 116 #define HD_OSC_FREQUENCY                  165000000  /* 0x09D5B340 */
 117
 118 #define HD_H_SYNC                         ( 79 - 1)
 119 #define HD_H_FRONT_PORCH                  (128 - 1)
 120 #define HD_H_BACK_PORCH                   (328 - 1)
 121
 122 #define HD_V_SYNC                         (  5 - 1)
 123 #define HD_V_FRONT_PORCH                  (  3 - 1)
 124 #define HD_V_BACK_PORCH                   ( 32 - 1)
 125
 126 // WVGA Mode: 800 x 480
 127 #define WVGA_H_RES_PIXELS                 800
 128 #define WVGA_V_RES_PIXELS                 480
 129 #define WVGA_OSC_FREQUENCY                29500000   /* 0x01C22260 */
 130 #define WVGA_H_SYNC                       ( 72 - 1)
 131 #define WVGA_H_FRONT_PORCH                ( 24 - 1)
 132 #define WVGA_H_BACK_PORCH                 ( 96 - 1)
 133 #define WVGA_V_SYNC                       (  7 - 1)
 134 #define WVGA_V_FRONT_PORCH                (  3 - 1)
 135 #define WVGA_V_BACK_PORCH                 ( 10 - 1)
 136
 137 // QHD Mode: 960 x 540
 138 #define QHD_H_RES_PIXELS                  960
 139 #define QHD_V_RES_PIXELS                  540
 140 #define QHD_OSC_FREQUENCY                 40750000   /* 0x026DCBB0 */
 141 #define QHD_H_SYNC                        ( 96 - 1)
 142 #define QHD_H_FRONT_PORCH                 ( 32 - 1)
 143 #define QHD_H_BACK_PORCH                  (128 - 1)
 144 #define QHD_V_SYNC                        (  5 - 1)
 145 #define QHD_V_FRONT_PORCH                 (  3 - 1)
 146 #define QHD_V_BACK_PORCH                  ( 14 - 1)
 147
 148 // WSVGA Mode: 1024 x 600
 149 #define WSVGA_H_RES_PIXELS                1024
 150 #define WSVGA_V_RES_PIXELS                600
 151 #define WSVGA_OSC_FREQUENCY               49000000   /* 0x02EBAE40 */
 152 #define WSVGA_H_SYNC                      (104 - 1)
 153 #define WSVGA_H_FRONT_PORCH               ( 40 - 1)
 154 #define WSVGA_H_BACK_PORCH                (144 - 1)
 155 #define WSVGA_V_SYNC                      ( 10 - 1)
 156 #define WSVGA_V_FRONT_PORCH               (  3 - 1)
 157 #define WSVGA_V_BACK_PORCH                ( 11 - 1)
 158
 159 // HD720 Mode: 1280 x 720
 160 #define HD720_H_RES_PIXELS                 1280
 161 #define HD720_V_RES_PIXELS                 720
 162 #define HD720_OSC_FREQUENCY                74500000   /* 0x0470C7A0 */
 163 #define HD720_H_SYNC                       (128 - 1)
 164 #define HD720_H_FRONT_PORCH                ( 64 - 1)
 165 #define HD720_H_BACK_PORCH                 (192 - 1)
 166 #define HD720_V_SYNC                       (  5 - 1)
 167 #define HD720_V_FRONT_PORCH                (  3 - 1)
 168 #define HD720_V_BACK_PORCH                 ( 20 - 1)
 169
 170 // WXGA Mode: 1280 x 800
 171 #define WXGA_H_RES_PIXELS                  1280
 172 #define WXGA_V_RES_PIXELS                  800
 173 #define WXGA_OSC_FREQUENCY                 83500000  /* 0x04FA1BE0 */
 174 #define WXGA_H_SYNC                        (128 - 1)
 175 #define WXGA_H_FRONT_PORCH                 ( 72 - 1)
 176 #define WXGA_H_BACK_PORCH                  (200 - 1)
 177 #define WXGA_V_SYNC                        (  6 - 1)
 178 #define WXGA_V_FRONT_PORCH                 (  3 - 1)
 179 #define WXGA_V_BACK_PORCH                  ( 22 - 1)
 180
 181 // Colour Masks
 182 #define LCD_24BPP_RED_MASK              0x00FF0000
 183 #define LCD_24BPP_GREEN_MASK            0x0000FF00
 184 #define LCD_24BPP_BLUE_MASK             0x000000FF
 185 #define LCD_24BPP_RESERVED_MASK         0xFF000000
 186
 187 #define LCD_16BPP_555_RED_MASK          0x00007C00
 188 #define LCD_16BPP_555_GREEN_MASK        0x000003E0
 189 #define LCD_16BPP_555_BLUE_MASK         0x0000001F
 190 #define LCD_16BPP_555_RESERVED_MASK     0x00000000
 191
 192 #define LCD_16BPP_565_RED_MASK          0x0000F800
 193 #define LCD_16BPP_565_GREEN_MASK        0x000007E0
 194 #define LCD_16BPP_565_BLUE_MASK         0x0000001F
 195 #define LCD_16BPP_565_RESERVED_MASK     0x00008000
 196
 197 #define LCD_12BPP_444_RED_MASK          0x00000F00
 198 #define LCD_12BPP_444_GREEN_MASK        0x000000F0
 199 #define LCD_12BPP_444_BLUE_MASK         0x0000000F
 200 #define LCD_12BPP_444_RESERVED_MASK     0x0000F000
 201
 202 /** The enumeration maps the PL111 LcdBpp values used in the LCD Control
 203   Register
 204 **/
 205 typedef enum {
 206   LCD_BITS_PER_PIXEL_1 = 0,
 207   LCD_BITS_PER_PIXEL_2,
 208   LCD_BITS_PER_PIXEL_4,
 209   LCD_BITS_PER_PIXEL_8,
 210   LCD_BITS_PER_PIXEL_16_555,
 211   LCD_BITS_PER_PIXEL_24,
 212   LCD_BITS_PER_PIXEL_16_565,
 213   LCD_BITS_PER_PIXEL_12_444
 214 } LCD_BPP;
 215
 216 // Display timing settings.
 217 typedef struct {
 218   UINT32                      Resolution;
 219   UINT32                      Sync;
 220   UINT32                      BackPorch;
 221   UINT32                      FrontPorch;
 222 } SCAN_TIMINGS;
 223
 224 /** Platform related initialization function.
 225
 226   @param[in] Handle              Handle to the LCD device instance.
 227
 228   @retval EFI_SUCCESS            Plaform library initialized successfully.
 229   @retval !(EFI_SUCCESS)         Other errors.
 230 **/
 231 EFI_STATUS
 232 LcdPlatformInitializeDisplay (
 233   IN EFI_HANDLE   Handle
 234   );
 235
 236 /** Allocate VRAM memory in DRAM for the framebuffer
 237   (unless it is reserved already).
 238
 239   The allocated address can be used to set the framebuffer.
 240
 241   @param[out] VramBaseAddress      A pointer to the framebuffer address.
 242   @param[out] VramSize             A pointer to the size of the frame
 243                                    buffer in bytes
 244
 245   @retval EFI_SUCCESS              Frame buffer memory allocated successfully.
 246   @retval !(EFI_SUCCESS)           Other errors.
 247 **/
 248 EFI_STATUS
 249 LcdPlatformGetVram (
 250   OUT EFI_PHYSICAL_ADDRESS*                 VramBaseAddress,
 251   OUT UINTN*                                VramSize
 252   );
 253
 254 /** Return total number of modes supported.
 255
 256   Note: Valid mode numbers are 0 to MaxMode - 1
 257   See Section 12.9 of the UEFI Specification 2.7
 258
 259   @retval UINT32             Mode Number.
 260 **/
 261 UINT32
 262 LcdPlatformGetMaxMode (
 263   VOID
 264   );
 265
 266 /** Set the requested display mode.
 267
 268   @param[in] ModeNumber            Mode Number.
 269
 270   @retval  EFI_SUCCESS             Mode set successfully.
 271   @retval  EFI_INVALID_PARAMETER   Requested mode not found.
 272   @retval  !(EFI_SUCCESS)          Other errors.
 273 **/
 274 EFI_STATUS
 275 LcdPlatformSetMode (
 276   IN UINT32                                 ModeNumber
 277   );
 278
 279 /** Return information for the requested mode number.
 280
 281   @param[in]  ModeNumber         Mode Number.
 282   @param[out] Info               Pointer for returned mode information
 283                                  (on success).
 284
 285   @retval EFI_SUCCESS             Mode information for the requested mode
 286                                   returned successfully.
 287   @retval EFI_INVALID_PARAMETER   Requested mode not found.
 288 **/
 289 EFI_STATUS
 290 LcdPlatformQueryMode (
 291   IN  UINT32                                ModeNumber,
 292   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
 293   );
 294
 295 /** Return display timing information for the requested mode number.
 296
 297   @param[in]  ModeNumber          Mode Number.
 298
 299   @param[out] Horizontal          Pointer to horizontal timing parameters.
 300                                   (Resolution, Sync, Back porch, Front porch)
 301   @param[out] Vertical            Pointer to vertical timing parameters.
 302                                   (Resolution, Sync, Back porch, Front porch)
 303
 304
 305   @retval EFI_SUCCESS             Display timing information for the requested
 306                                   mode returned successfully.
 307   @retval EFI_INVALID_PARAMETER   Requested mode not found.
 308 **/
 309 EFI_STATUS
 310 LcdPlatformGetTimings (
 311   IN  UINT32                              ModeNumber,
 312   OUT SCAN_TIMINGS                        **Horizontal,
 313   OUT SCAN_TIMINGS                        **Vertical
 314   );
 315
 316 /** Return bits per pixel information for a mode number.
 317
 318   @param[in]  ModeNumber          Mode Number.
 319
 320   @param[out] Bpp                 Pointer to value bits per pixel information.
 321
 322   @retval EFI_SUCCESS             Bit per pixel information for the requested
 323                                   mode returned successfully.
 324   @retval EFI_INVALID_PARAMETER   Requested mode not found.
 325 **/
 326 EFI_STATUS
 327 LcdPlatformGetBpp (
 328   IN  UINT32                                ModeNumber,
 329   OUT LCD_BPP*                              Bpp
 330   );
 331
 332 #endif /* LCD_PLATFORM_LIB_H_ */