e51e78640ae7b1acd51ac333ba3faa8c78aea5a5
[mirror_edk2.git] / ArmPlatformPkg / Include / Library / LcdPlatformLib.h
1 /** @file
2
3 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 **/
13
14 #ifndef LCD_PLATFORM_LIB_H_
15 #define LCD_PLATFORM_LIB_H_
16
17 #include <Protocol/GraphicsOutput.h>
18
19 #define LCD_VRAM_SIZE SIZE_8MB
20
21 // Modes definitions
22 #define VGA 0
23 #define SVGA 1
24 #define XGA 2
25 #define SXGA 3
26 #define WSXGA 4
27 #define UXGA 5
28 #define HD 6
29
30 // VGA Mode: 640 x 480
31 #define VGA_H_RES_PIXELS 640
32 #define VGA_V_RES_PIXELS 480
33 #define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */
34
35 #define VGA_H_SYNC ( 80 - 1)
36 #define VGA_H_FRONT_PORCH ( 16 - 1)
37 #define VGA_H_BACK_PORCH ( 64 - 1)
38
39 #define VGA_V_SYNC ( 4 - 1)
40 #define VGA_V_FRONT_PORCH ( 3 - 1)
41 #define VGA_V_BACK_PORCH ( 13 - 1)
42
43 // SVGA Mode: 800 x 600
44 #define SVGA_H_RES_PIXELS 800
45 #define SVGA_V_RES_PIXELS 600
46 #define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */
47
48 #define SVGA_H_SYNC ( 80 - 1)
49 #define SVGA_H_FRONT_PORCH ( 32 - 1)
50 #define SVGA_H_BACK_PORCH (112 - 1)
51
52 #define SVGA_V_SYNC ( 4 - 1)
53 #define SVGA_V_FRONT_PORCH ( 3 - 1)
54 #define SVGA_V_BACK_PORCH ( 17 - 1)
55
56 // XGA Mode: 1024 x 768
57 #define XGA_H_RES_PIXELS 1024
58 #define XGA_V_RES_PIXELS 768
59 #define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */
60
61 #define XGA_H_SYNC (104 - 1)
62 #define XGA_H_FRONT_PORCH ( 48 - 1)
63 #define XGA_H_BACK_PORCH (152 - 1)
64
65 #define XGA_V_SYNC ( 4 - 1)
66 #define XGA_V_FRONT_PORCH ( 3 - 1)
67 #define XGA_V_BACK_PORCH ( 23 - 1)
68
69 // SXGA Mode: 1280 x 1024
70 #define SXGA_H_RES_PIXELS 1280
71 #define SXGA_V_RES_PIXELS 1024
72 #define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */
73
74 #define SXGA_H_SYNC (136 - 1)
75 #define SXGA_H_FRONT_PORCH ( 80 - 1)
76 #define SXGA_H_BACK_PORCH (216 - 1)
77
78 #define SXGA_V_SYNC ( 7 - 1)
79 #define SXGA_V_FRONT_PORCH ( 3 - 1)
80 #define SXGA_V_BACK_PORCH ( 29 - 1)
81
82 // WSXGA+ Mode: 1680 x 1050
83 #define WSXGA_H_RES_PIXELS 1680
84 #define WSXGA_V_RES_PIXELS 1050
85 #define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */
86
87 #define WSXGA_H_SYNC (170 - 1)
88 #define WSXGA_H_FRONT_PORCH (104 - 1)
89 #define WSXGA_H_BACK_PORCH (274 - 1)
90
91 #define WSXGA_V_SYNC ( 5 - 1)
92 #define WSXGA_V_FRONT_PORCH ( 4 - 1)
93 #define WSXGA_V_BACK_PORCH ( 41 - 1)
94
95 // UXGA Mode: 1600 x 1200
96 #define UXGA_H_RES_PIXELS 1600
97 #define UXGA_V_RES_PIXELS 1200
98 #define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */
99
100 #define UXGA_H_SYNC (168 - 1)
101 #define UXGA_H_FRONT_PORCH (112 - 1)
102 #define UXGA_H_BACK_PORCH (280 - 1)
103
104 #define UXGA_V_SYNC ( 4 - 1)
105 #define UXGA_V_FRONT_PORCH ( 3 - 1)
106 #define UXGA_V_BACK_PORCH ( 38 - 1)
107
108 // HD Mode: 1920 x 1080
109 #define HD_H_RES_PIXELS 1920
110 #define HD_V_RES_PIXELS 1080
111 #define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */
112
113 #define HD_H_SYNC ( 79 - 1)
114 #define HD_H_FRONT_PORCH (128 - 1)
115 #define HD_H_BACK_PORCH (328 - 1)
116
117 #define HD_V_SYNC ( 5 - 1)
118 #define HD_V_FRONT_PORCH ( 3 - 1)
119 #define HD_V_BACK_PORCH ( 32 - 1)
120
121 // Colour Masks
122 #define LCD_24BPP_RED_MASK 0x00FF0000
123 #define LCD_24BPP_GREEN_MASK 0x0000FF00
124 #define LCD_24BPP_BLUE_MASK 0x000000FF
125 #define LCD_24BPP_RESERVED_MASK 0xFF000000
126
127 #define LCD_16BPP_555_RED_MASK 0x00007C00
128 #define LCD_16BPP_555_GREEN_MASK 0x000003E0
129 #define LCD_16BPP_555_BLUE_MASK 0x0000001F
130 #define LCD_16BPP_555_RESERVED_MASK 0x00000000
131
132 #define LCD_16BPP_565_RED_MASK 0x0000F800
133 #define LCD_16BPP_565_GREEN_MASK 0x000007E0
134 #define LCD_16BPP_565_BLUE_MASK 0x0000001F
135 #define LCD_16BPP_565_RESERVED_MASK 0x00008000
136
137 #define LCD_12BPP_444_RED_MASK 0x00000F00
138 #define LCD_12BPP_444_GREEN_MASK 0x000000F0
139 #define LCD_12BPP_444_BLUE_MASK 0x0000000F
140 #define LCD_12BPP_444_RESERVED_MASK 0x0000F000
141
142 /** The enumeration maps the PL111 LcdBpp values used in the LCD Control
143 Register
144 **/
145 typedef enum {
146 LCD_BITS_PER_PIXEL_1 = 0,
147 LCD_BITS_PER_PIXEL_2,
148 LCD_BITS_PER_PIXEL_4,
149 LCD_BITS_PER_PIXEL_8,
150 LCD_BITS_PER_PIXEL_16_555,
151 LCD_BITS_PER_PIXEL_24,
152 LCD_BITS_PER_PIXEL_16_565,
153 LCD_BITS_PER_PIXEL_12_444
154 } LCD_BPP;
155
156 /** Platform related initialization function.
157
158 @param[in] Handle Handle to the LCD device instance.
159
160 @retval EFI_SUCCESS Plaform library initialized successfully.
161 @retval !(EFI_SUCCESS) Other errors.
162 **/
163 EFI_STATUS
164 LcdPlatformInitializeDisplay (
165 IN EFI_HANDLE Handle
166 );
167
168 /** Allocate VRAM memory in DRAM for the framebuffer
169 (unless it is reserved already).
170
171 The allocated address can be used to set the framebuffer.
172
173 @param[out] VramBaseAddress A pointer to the framebuffer address.
174 @param[out] VramSize A pointer to the size of the frame
175 buffer in bytes
176
177 @retval EFI_SUCCESS Frame buffer memory allocated successfully.
178 @retval !(EFI_SUCCESS) Other errors.
179 **/
180 EFI_STATUS
181 LcdPlatformGetVram (
182 OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
183 OUT UINTN* VramSize
184 );
185
186 /** Return total number of modes supported.
187
188 Note: Valid mode numbers are 0 to MaxMode - 1
189 See Section 12.9 of the UEFI Specification 2.7
190
191 @retval UINT32 Mode Number.
192 **/
193 UINT32
194 LcdPlatformGetMaxMode (
195 VOID
196 );
197
198 /** Set the requested display mode.
199
200 @param[in] ModeNumber Mode Number.
201
202 @retval EFI_SUCCESS Mode set successfully.
203 @retval EFI_INVALID_PARAMETER Requested mode not found.
204 @retval !(EFI_SUCCESS) Other errors.
205 **/
206 EFI_STATUS
207 LcdPlatformSetMode (
208 IN UINT32 ModeNumber
209 );
210
211 /** Return information for the requested mode number.
212
213 @param[in] ModeNumber Mode Number.
214 @param[out] Info Pointer for returned mode information
215 (on success).
216
217 @retval EFI_SUCCESS Mode information for the requested mode
218 returned successfully.
219 @retval EFI_INVALID_PARAMETER Requested mode not found.
220 **/
221 EFI_STATUS
222 LcdPlatformQueryMode (
223 IN UINT32 ModeNumber,
224 OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
225 );
226
227 /** Return display timing information for the requested mode number.
228
229 @param[in] ModeNumber Mode Number.
230
231 @param[out] HRes Pointer to horizontal resolution.
232 @param[out] HSync Pointer to horizontal sync width.
233 @param[out] HBackPorch Pointer to horizontal back porch.
234 @param[out] HFrontPorch Pointer to horizontal front porch.
235 @param[out] VRes Pointer to vertical resolution.
236 @param[out] VSync Pointer to vertical sync width.
237 @param[out] VBackPorch Pointer to vertical back porch.
238 @param[out] VFrontPorch Pointer to vertical front porch.
239
240 @retval EFI_SUCCESS Display timing information for the requested
241 mode returned successfully.
242 @retval EFI_INVALID_PARAMETER Requested mode not found.
243 **/
244 EFI_STATUS
245 LcdPlatformGetTimings (
246 IN UINT32 ModeNumber,
247 OUT UINT32* HRes,
248 OUT UINT32* HSync,
249 OUT UINT32* HBackPorch,
250 OUT UINT32* HFrontPorch,
251 OUT UINT32* VRes,
252 OUT UINT32* VSync,
253 OUT UINT32* VBackPorch,
254 OUT UINT32* VFrontPorch
255 );
256
257 /** Return bits per pixel information for a mode number.
258
259 @param[in] ModeNumber Mode Number.
260
261 @param[out] Bpp Pointer to value bits per pixel information.
262
263 @retval EFI_SUCCESS Bit per pixel information for the requested
264 mode returned successfully.
265 @retval EFI_INVALID_PARAMETER Requested mode not found.
266 **/
267 EFI_STATUS
268 LcdPlatformGetBpp (
269 IN UINT32 ModeNumber,
270 OUT LCD_BPP* Bpp
271 );
272
273 #endif /* LCD_PLATFORM_LIB_H_ */