ArmPlatformPkg/Library/ArmPlatformSecLibNull/AArch64/ArmPlatformLibNullBoot.S

   1 //
   2 //  Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <Base.h>
  15 #include <AutoGen.h>
  16
  17 .text
  18 .align 3
  19
  20 GCC_ASM_EXPORT(ArmPlatformSecBootAction)
  21 GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
  22 GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)
  23 GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)
  24
  25 /**
  26   Call at the beginning of the platform boot up
  27
  28   This function allows the firmware platform to do extra actions at the early
  29   stage of the platform power up.
  30
  31   Note: This function must be implemented in assembler as there is no stack set up yet
  32
  33 **/
  34 ASM_PFX(ArmPlatformSecBootAction):
  35   ret
  36
  37 /**
  38   Initialize the memory where the initial stacks will reside
  39
  40   This memory can contain the initial stacks (Secure and Secure Monitor stacks).
  41   In some platform, this region is already initialized and the implementation of this function can
  42   do nothing. This memory can also represent the Secure RAM.
  43   This function is called before the satck has been set up. Its implementation must ensure the stack
  44   pointer is not used (probably required to use assembly language)
  45
  46 **/
  47 ASM_PFX(ArmPlatformSecBootMemoryInit):
  48   // The SMC does not need to be initialized for RTSM
  49   ret
  50
  51 /* Write the flag register used to start Secondary cores */
  52 ASM_PFX(ArmSecMpCoreSecondariesWrite):
  53   // Write to the CPU Mailbox
  54   ret
  55
  56
  57 /* Read the flag register used to start Secondary cores */
  58 ASM_PFX(ArmSecMpCoreSecondariesRead):
  59   // Return the value from the CPU Mailbox
  60   mov x0, #0
  61   ret