ArmPlatformPkg/Library/HdLcd/HdLcd.c

   1 /** @file
   2   This file contains the platform independent parts of HdLcd
   3
   4   Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
   5
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/LcdHwLib.h>
  19 #include <Library/LcdPlatformLib.h>
  20 #include <Library/MemoryAllocationLib.h>
  21 #include <Library/PcdLib.h>
  22
  23 #include "HdLcd.h"
  24
  25 STATIC
  26 UINTN
  27 GetBytesPerPixel (
  28   IN  LCD_BPP       Bpp
  29   )
  30 {
  31   switch (Bpp) {
  32   case LCD_BITS_PER_PIXEL_24:
  33     return 4;
  34
  35   case LCD_BITS_PER_PIXEL_16_565:
  36   case LCD_BITS_PER_PIXEL_16_555:
  37   case LCD_BITS_PER_PIXEL_12_444:
  38     return 2;
  39
  40   case LCD_BITS_PER_PIXEL_8:
  41   case LCD_BITS_PER_PIXEL_4:
  42   case LCD_BITS_PER_PIXEL_2:
  43   case LCD_BITS_PER_PIXEL_1:
  44     return 1;
  45
  46   default:
  47     return 0;
  48   }
  49 }
  50
  51 /** Initialize display.
  52
  53   @param[in]  VramBaseAddress    Address of the framebuffer.
  54
  55   @retval EFI_SUCCESS            Display initialization successful.
  56 **/
  57 EFI_STATUS
  58 LcdInitialize (
  59   IN EFI_PHYSICAL_ADDRESS   VramBaseAddress
  60   )
  61 {
  62   // Disable the controller
  63   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
  64
  65   // Disable all interrupts
  66   MmioWrite32 (HDLCD_REG_INT_MASK, 0);
  67
  68   // Define start of the VRAM. This never changes for any graphics mode
  69   MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);
  70
  71   // Setup various registers that never change
  72   MmioWrite32 (HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);
  73
  74   MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);
  75
  76   MmioWrite32 (
  77     HDLCD_REG_PIXEL_FORMAT,
  78     HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL
  79     );
  80
  81   MmioWrite32 (HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 | 0));
  82   MmioWrite32 (HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));
  83   MmioWrite32 (HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));
  84
  85   return EFI_SUCCESS;
  86 }
  87
  88 /** Set requested mode of the display.
  89
  90   @param[in] ModeNumber          Display mode number.
  91
  92   @retval EFI_SUCCESS            Display mode set successfully.
  93   @retval !(EFI_SUCCESS)         Other errors.
  94 **/
  95 EFI_STATUS
  96 LcdSetMode (
  97   IN UINT32  ModeNumber
  98   )
  99 {
 100   EFI_STATUS        Status;
 101   UINT32            HRes;
 102   UINT32            HSync;
 103   UINT32            HBackPorch;
 104   UINT32            HFrontPorch;
 105   UINT32            VRes;
 106   UINT32            VSync;
 107   UINT32            VBackPorch;
 108   UINT32            VFrontPorch;
 109   UINT32            BytesPerPixel;
 110   LCD_BPP           LcdBpp;
 111
 112   // Set the video mode timings and other relevant information
 113   Status = LcdPlatformGetTimings (
 114              ModeNumber,
 115              &HRes,
 116              &HSync,
 117              &HBackPorch,
 118              &HFrontPorch,
 119              &VRes,
 120              &VSync,
 121              &VBackPorch,
 122              &VFrontPorch
 123              );
 124   if (EFI_ERROR (Status)) {
 125     ASSERT_EFI_ERROR (Status);
 126     return Status;
 127   }
 128
 129   Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);
 130   if (EFI_ERROR (Status)) {
 131     ASSERT_EFI_ERROR (Status);
 132     return Status;
 133   }
 134
 135   BytesPerPixel = GetBytesPerPixel (LcdBpp);
 136
 137   // Disable the controller
 138   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
 139
 140   // Update the frame buffer information with the new settings
 141   MmioWrite32 (HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);
 142   MmioWrite32 (HDLCD_REG_FB_LINE_PITCH,  HRes * BytesPerPixel);
 143   MmioWrite32 (HDLCD_REG_FB_LINE_COUNT,  VRes - 1);
 144
 145   // Set the vertical timing information
 146   MmioWrite32 (HDLCD_REG_V_SYNC,         VSync);
 147   MmioWrite32 (HDLCD_REG_V_BACK_PORCH,   VBackPorch);
 148   MmioWrite32 (HDLCD_REG_V_DATA,         VRes - 1);
 149   MmioWrite32 (HDLCD_REG_V_FRONT_PORCH,  VFrontPorch);
 150
 151   // Set the horizontal timing information
 152   MmioWrite32 (HDLCD_REG_H_SYNC,         HSync);
 153   MmioWrite32 (HDLCD_REG_H_BACK_PORCH,   HBackPorch);
 154   MmioWrite32 (HDLCD_REG_H_DATA,         HRes - 1);
 155   MmioWrite32 (HDLCD_REG_H_FRONT_PORCH,  HFrontPorch);
 156
 157   // Enable the controller
 158   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);
 159
 160   return EFI_SUCCESS;
 161 }
 162
 163 /** De-initializes the display.
 164 **/
 165 VOID
 166 LcdShutdown (
 167   VOID
 168   )
 169 {
 170   // Disable the controller
 171   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
 172 }
 173
 174 /** Check for presence of HDLCD.
 175
 176   @retval EFI_SUCCESS            Returns success if platform implements a HDLCD
 177                                  controller.
 178   @retval EFI_NOT_FOUND          HDLCD display controller not found on the
 179                                  platform.
 180 **/
 181 EFI_STATUS
 182 LcdIdentify (
 183   VOID
 184   )
 185 {
 186   if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {
 187     return EFI_SUCCESS;
 188   }
 189
 190   return EFI_NOT_FOUND;
 191 }