ArmPlatformPkg: Redefine LcdPlatformGetTimings function
[mirror_edk2.git] / ArmPlatformPkg / Library / HdLcd / HdLcd.c
1 /** @file
2 This file contains the platform independent parts of HdLcd
3
4 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #include <Library/DebugLib.h>
17 #include <Library/IoLib.h>
18 #include <Library/LcdHwLib.h>
19 #include <Library/LcdPlatformLib.h>
20 #include <Library/MemoryAllocationLib.h>
21 #include <Library/PcdLib.h>
22
23 #include "HdLcd.h"
24
25 STATIC
26 UINTN
27 GetBytesPerPixel (
28 IN LCD_BPP Bpp
29 )
30 {
31 switch (Bpp) {
32 case LCD_BITS_PER_PIXEL_24:
33 return 4;
34
35 case LCD_BITS_PER_PIXEL_16_565:
36 case LCD_BITS_PER_PIXEL_16_555:
37 case LCD_BITS_PER_PIXEL_12_444:
38 return 2;
39
40 case LCD_BITS_PER_PIXEL_8:
41 case LCD_BITS_PER_PIXEL_4:
42 case LCD_BITS_PER_PIXEL_2:
43 case LCD_BITS_PER_PIXEL_1:
44 return 1;
45
46 default:
47 return 0;
48 }
49 }
50
51 /** Initialize display.
52
53 @param[in] VramBaseAddress Address of the framebuffer.
54
55 @retval EFI_SUCCESS Display initialization successful.
56 **/
57 EFI_STATUS
58 LcdInitialize (
59 IN EFI_PHYSICAL_ADDRESS VramBaseAddress
60 )
61 {
62 // Disable the controller
63 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
64
65 // Disable all interrupts
66 MmioWrite32 (HDLCD_REG_INT_MASK, 0);
67
68 // Define start of the VRAM. This never changes for any graphics mode
69 MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);
70
71 // Setup various registers that never change
72 MmioWrite32 (HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);
73
74 MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);
75
76 MmioWrite32 (
77 HDLCD_REG_PIXEL_FORMAT,
78 HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL
79 );
80
81 MmioWrite32 (HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0));
82 MmioWrite32 (HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));
83 MmioWrite32 (HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16));
84
85 return EFI_SUCCESS;
86 }
87
88 /** Set requested mode of the display.
89
90 @param[in] ModeNumber Display mode number.
91
92 @retval EFI_SUCCESS Display mode set successfully.
93 @retval !(EFI_SUCCESS) Other errors.
94 **/
95 EFI_STATUS
96 LcdSetMode (
97 IN UINT32 ModeNumber
98 )
99 {
100 EFI_STATUS Status;
101 SCAN_TIMINGS *Horizontal;
102 SCAN_TIMINGS *Vertical;
103 UINT32 BytesPerPixel;
104 LCD_BPP LcdBpp;
105
106 // Set the video mode timings and other relevant information
107 Status = LcdPlatformGetTimings (
108 ModeNumber,
109 &Horizontal,
110 &Vertical
111 );
112 if (EFI_ERROR (Status)) {
113 ASSERT_EFI_ERROR (Status);
114 return Status;
115 }
116
117 ASSERT (Horizontal != NULL);
118 ASSERT (Vertical != NULL);
119
120 Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);
121 if (EFI_ERROR (Status)) {
122 ASSERT_EFI_ERROR (Status);
123 return Status;
124 }
125
126 BytesPerPixel = GetBytesPerPixel (LcdBpp);
127
128 // Disable the controller
129 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
130
131 // Update the frame buffer information with the new settings
132 MmioWrite32 (
133 HDLCD_REG_FB_LINE_LENGTH,
134 Horizontal->Resolution * BytesPerPixel
135 );
136
137 MmioWrite32 (HDLCD_REG_FB_LINE_PITCH, Horizontal->Resolution * BytesPerPixel);
138
139 MmioWrite32 (HDLCD_REG_FB_LINE_COUNT, Vertical->Resolution - 1);
140
141 // Set the vertical timing information
142 MmioWrite32 (HDLCD_REG_V_SYNC, Vertical->Sync);
143 MmioWrite32 (HDLCD_REG_V_BACK_PORCH, Vertical->BackPorch);
144 MmioWrite32 (HDLCD_REG_V_DATA, Vertical->Resolution - 1);
145 MmioWrite32 (HDLCD_REG_V_FRONT_PORCH, Vertical->FrontPorch);
146
147 // Set the horizontal timing information
148 MmioWrite32 (HDLCD_REG_H_SYNC, Horizontal->Sync);
149 MmioWrite32 (HDLCD_REG_H_BACK_PORCH, Horizontal->BackPorch);
150 MmioWrite32 (HDLCD_REG_H_DATA, Horizontal->Resolution - 1);
151 MmioWrite32 (HDLCD_REG_H_FRONT_PORCH, Horizontal->FrontPorch);
152
153 // Enable the controller
154 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);
155
156 return EFI_SUCCESS;
157 }
158
159 /** De-initializes the display.
160 **/
161 VOID
162 LcdShutdown (
163 VOID
164 )
165 {
166 // Disable the controller
167 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
168 }
169
170 /** Check for presence of HDLCD.
171
172 @retval EFI_SUCCESS Returns success if platform implements a HDLCD
173 controller.
174 @retval EFI_NOT_FOUND HDLCD display controller not found on the
175 platform.
176 **/
177 EFI_STATUS
178 LcdIdentify (
179 VOID
180 )
181 {
182 if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {
183 return EFI_SUCCESS;
184 }
185
186 return EFI_NOT_FOUND;
187 }