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1 /** @file
2 Serial I/O Port library functions with no library constructor/destructor
3
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #include <Base.h>
19
20 #include <Library/IoLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/SerialPortLib.h>
23
24 #include <Drivers/PL011Uart.h>
25
26
27 /**
28
29 Programmed hardware of Serial port.
30
31 @return Always return RETURN_UNSUPPORTED.
32
33 **/
34 RETURN_STATUS
35 EFIAPI
36 SerialPortInitialize (
37 VOID
38 )
39 {
40 UINT64 BaudRate;
41 UINT32 ReceiveFifoDepth;
42 EFI_PARITY_TYPE Parity;
43 UINT8 DataBits;
44 EFI_STOP_BITS_TYPE StopBits;
45
46 BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
47 ReceiveFifoDepth = 0; // Use default FIFO depth
48 Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
49 DataBits = PcdGet8 (PcdUartDefaultDataBits);
50 StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
51
52 return PL011UartInitializePort (
53 (UINTN)PcdGet64 (PcdSerialRegisterBase),
54 &BaudRate,
55 &ReceiveFifoDepth,
56 &Parity,
57 &DataBits,
58 &StopBits
59 );
60 }
61
62 /**
63 Write data to serial device.
64
65 @param Buffer Point of data buffer which need to be written.
66 @param NumberOfBytes Number of output bytes which are cached in Buffer.
67
68 @retval 0 Write data failed.
69 @retval !0 Actual number of bytes written to serial device.
70
71 **/
72 UINTN
73 EFIAPI
74 SerialPortWrite (
75 IN UINT8 *Buffer,
76 IN UINTN NumberOfBytes
77 )
78 {
79 return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
80 }
81
82 /**
83 Read data from serial device and save the data in buffer.
84
85 @param Buffer Point of data buffer which need to be written.
86 @param NumberOfBytes Number of output bytes which are cached in Buffer.
87
88 @retval 0 Read data failed.
89 @retval !0 Actual number of bytes read from serial device.
90
91 **/
92 UINTN
93 EFIAPI
94 SerialPortRead (
95 OUT UINT8 *Buffer,
96 IN UINTN NumberOfBytes
97 )
98 {
99 return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
100 }
101
102 /**
103 Check to see if any data is available to be read from the debug device.
104
105 @retval EFI_SUCCESS At least one byte of data is available to be read
106 @retval EFI_NOT_READY No data is available to be read
107 @retval EFI_DEVICE_ERROR The serial device is not functioning properly
108
109 **/
110 BOOLEAN
111 EFIAPI
112 SerialPortPoll (
113 VOID
114 )
115 {
116 return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
117 }
118 /**
119 Set new attributes to PL011.
120
121 @param BaudRate The baud rate of the serial device. If the
122 baud rate is not supported, the speed will
123 be reduced down to the nearest supported one
124 and the variable's value will be updated
125 accordingly.
126 @param ReceiveFifoDepth The number of characters the device will
127 buffer on input. If the specified value is
128 not supported, the variable's value will
129 be reduced down to the nearest supported one.
130 @param Timeout If applicable, the number of microseconds the
131 device will wait before timing out a Read or
132 a Write operation.
133 @param Parity If applicable, this is the EFI_PARITY_TYPE
134 that is computed or checked as each character
135 is transmitted or received. If the device
136 does not support parity, the value is the
137 default parity value.
138 @param DataBits The number of data bits in each character
139 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number
140 of stop bits per character. If the device
141 does not support stop bits, the value is the
142 default stop bit value.
143
144 @retval EFI_SUCCESS All attributes were set correctly.
145 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported
146 value.
147
148 **/
149 RETURN_STATUS
150 EFIAPI
151 SerialPortSetAttributes (
152 IN OUT UINT64 *BaudRate,
153 IN OUT UINT32 *ReceiveFifoDepth,
154 IN OUT UINT32 *Timeout,
155 IN OUT EFI_PARITY_TYPE *Parity,
156 IN OUT UINT8 *DataBits,
157 IN OUT EFI_STOP_BITS_TYPE *StopBits
158 )
159 {
160 return PL011UartInitializePort (
161 (UINTN)PcdGet64 (PcdSerialRegisterBase),
162 BaudRate,
163 ReceiveFifoDepth,
164 Parity,
165 DataBits,
166 StopBits
167 );
168 }
169
170 /**
171
172 Assert or deassert the control signals on a serial port.
173 The following control signals are set according their bit settings :
174 . Request to Send
175 . Data Terminal Ready
176
177 @param[in] Control The following bits are taken into account :
178 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the
179 "Request To Send" control signal if this bit is
180 equal to one/zero.
181 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert
182 the "Data Terminal Ready" control signal if this
183 bit is equal to one/zero.
184 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable
185 the hardware loopback if this bit is equal to
186 one/zero.
187 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.
188 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/
189 disable the hardware flow control based on CTS (Clear
190 To Send) and RTS (Ready To Send) control signals.
191
192 @retval RETURN_SUCCESS The new control bits were set on the device.
193 @retval RETURN_UNSUPPORTED The device does not support this operation.
194
195 **/
196 RETURN_STATUS
197 EFIAPI
198 SerialPortSetControl (
199 IN UINT32 Control
200 )
201 {
202 return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
203 }
204
205 /**
206
207 Retrieve the status of the control bits on a serial device.
208
209 @param[out] Control Status of the control bits on a serial device :
210
211 . EFI_SERIAL_DATA_CLEAR_TO_SEND,
212 EFI_SERIAL_DATA_SET_READY,
213 EFI_SERIAL_RING_INDICATE,
214 EFI_SERIAL_CARRIER_DETECT,
215 EFI_SERIAL_REQUEST_TO_SEND,
216 EFI_SERIAL_DATA_TERMINAL_READY
217 are all related to the DTE (Data Terminal Equipment)
218 and DCE (Data Communication Equipment) modes of
219 operation of the serial device.
220 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the
221 receive buffer is empty, 0 otherwise.
222 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the
223 transmit buffer is empty, 0 otherwise.
224 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if
225 the hardware loopback is enabled (the output feeds
226 the receive buffer), 0 otherwise.
227 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one
228 if a loopback is accomplished by software, else 0.
229 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to
230 one if the hardware flow control based on CTS (Clear
231 To Send) and RTS (Ready To Send) control signals is
232 enabled, 0 otherwise.
233
234 @retval RETURN_SUCCESS The control bits were read from the device.
235
236 **/
237 RETURN_STATUS
238 EFIAPI
239 SerialPortGetControl (
240 OUT UINT32 *Control
241 )
242 {
243 return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
244 }