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1 /** @file
2 Serial I/O Port library functions with no library constructor/destructor
3
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #include <Base.h>
19
20 #include <Library/IoLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/SerialPortLib.h>
23
24 #include <Drivers/PL011Uart.h>
25
26
27 /**
28
29 Programmed hardware of Serial port.
30
31 @return Always return RETURN_UNSUPPORTED.
32
33 **/
34 RETURN_STATUS
35 EFIAPI
36 SerialPortInitialize (
37 VOID
38 )
39 {
40 UINT64 BaudRate;
41 UINT32 ReceiveFifoDepth;
42 EFI_PARITY_TYPE Parity;
43 UINT8 DataBits;
44 EFI_STOP_BITS_TYPE StopBits;
45
46 BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
47 ReceiveFifoDepth = 0; // Use default FIFO depth
48 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
49 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
50 StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
51
52 return PL011UartInitializePort (
53 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
54 FixedPcdGet32 (PL011UartClkInHz),
55 &BaudRate,
56 &ReceiveFifoDepth,
57 &Parity,
58 &DataBits,
59 &StopBits
60 );
61 }
62
63 /**
64 Write data to serial device.
65
66 @param Buffer Point of data buffer which need to be written.
67 @param NumberOfBytes Number of output bytes which are cached in Buffer.
68
69 @retval 0 Write data failed.
70 @retval !0 Actual number of bytes written to serial device.
71
72 **/
73 UINTN
74 EFIAPI
75 SerialPortWrite (
76 IN UINT8 *Buffer,
77 IN UINTN NumberOfBytes
78 )
79 {
80 return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
81 }
82
83 /**
84 Read data from serial device and save the data in buffer.
85
86 @param Buffer Point of data buffer which need to be written.
87 @param NumberOfBytes Number of output bytes which are cached in Buffer.
88
89 @retval 0 Read data failed.
90 @retval !0 Actual number of bytes read from serial device.
91
92 **/
93 UINTN
94 EFIAPI
95 SerialPortRead (
96 OUT UINT8 *Buffer,
97 IN UINTN NumberOfBytes
98 )
99 {
100 return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
101 }
102
103 /**
104 Check to see if any data is available to be read from the debug device.
105
106 @retval EFI_SUCCESS At least one byte of data is available to be read
107 @retval EFI_NOT_READY No data is available to be read
108 @retval EFI_DEVICE_ERROR The serial device is not functioning properly
109
110 **/
111 BOOLEAN
112 EFIAPI
113 SerialPortPoll (
114 VOID
115 )
116 {
117 return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));
118 }
119 /**
120 Set new attributes to PL011.
121
122 @param BaudRate The baud rate of the serial device. If the
123 baud rate is not supported, the speed will
124 be reduced down to the nearest supported one
125 and the variable's value will be updated
126 accordingly.
127 @param ReceiveFifoDepth The number of characters the device will
128 buffer on input. If the specified value is
129 not supported, the variable's value will
130 be reduced down to the nearest supported one.
131 @param Timeout If applicable, the number of microseconds the
132 device will wait before timing out a Read or
133 a Write operation.
134 @param Parity If applicable, this is the EFI_PARITY_TYPE
135 that is computed or checked as each character
136 is transmitted or received. If the device
137 does not support parity, the value is the
138 default parity value.
139 @param DataBits The number of data bits in each character
140 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number
141 of stop bits per character. If the device
142 does not support stop bits, the value is the
143 default stop bit value.
144
145 @retval EFI_SUCCESS All attributes were set correctly.
146 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported
147 value.
148
149 **/
150 RETURN_STATUS
151 EFIAPI
152 SerialPortSetAttributes (
153 IN OUT UINT64 *BaudRate,
154 IN OUT UINT32 *ReceiveFifoDepth,
155 IN OUT UINT32 *Timeout,
156 IN OUT EFI_PARITY_TYPE *Parity,
157 IN OUT UINT8 *DataBits,
158 IN OUT EFI_STOP_BITS_TYPE *StopBits
159 )
160 {
161 return PL011UartInitializePort (
162 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
163 FixedPcdGet32 (PL011UartClkInHz),
164 BaudRate,
165 ReceiveFifoDepth,
166 Parity,
167 DataBits,
168 StopBits
169 );
170 }
171
172 /**
173
174 Assert or deassert the control signals on a serial port.
175 The following control signals are set according their bit settings :
176 . Request to Send
177 . Data Terminal Ready
178
179 @param[in] Control The following bits are taken into account :
180 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the
181 "Request To Send" control signal if this bit is
182 equal to one/zero.
183 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert
184 the "Data Terminal Ready" control signal if this
185 bit is equal to one/zero.
186 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable
187 the hardware loopback if this bit is equal to
188 one/zero.
189 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.
190 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/
191 disable the hardware flow control based on CTS (Clear
192 To Send) and RTS (Ready To Send) control signals.
193
194 @retval RETURN_SUCCESS The new control bits were set on the device.
195 @retval RETURN_UNSUPPORTED The device does not support this operation.
196
197 **/
198 RETURN_STATUS
199 EFIAPI
200 SerialPortSetControl (
201 IN UINT32 Control
202 )
203 {
204 return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
205 }
206
207 /**
208
209 Retrieve the status of the control bits on a serial device.
210
211 @param[out] Control Status of the control bits on a serial device :
212
213 . EFI_SERIAL_DATA_CLEAR_TO_SEND,
214 EFI_SERIAL_DATA_SET_READY,
215 EFI_SERIAL_RING_INDICATE,
216 EFI_SERIAL_CARRIER_DETECT,
217 EFI_SERIAL_REQUEST_TO_SEND,
218 EFI_SERIAL_DATA_TERMINAL_READY
219 are all related to the DTE (Data Terminal Equipment)
220 and DCE (Data Communication Equipment) modes of
221 operation of the serial device.
222 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the
223 receive buffer is empty, 0 otherwise.
224 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the
225 transmit buffer is empty, 0 otherwise.
226 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if
227 the hardware loopback is enabled (the output feeds
228 the receive buffer), 0 otherwise.
229 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one
230 if a loopback is accomplished by software, else 0.
231 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to
232 one if the hardware flow control based on CTS (Clear
233 To Send) and RTS (Ready To Send) control signals is
234 enabled, 0 otherwise.
235
236 @retval RETURN_SUCCESS The control bits were read from the device.
237
238 **/
239 RETURN_STATUS
240 EFIAPI
241 SerialPortGetControl (
242 OUT UINT32 *Control
243 )
244 {
245 return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
246 }