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ArmPlatformPkg/PL011SerialPortLib: use untyped PCD for register base
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1 /** @file
2 Serial I/O Port library functions with no library constructor/destructor
3
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #include <Base.h>
19
20 #include <Library/IoLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/PL011UartClockLib.h>
23 #include <Library/PL011UartLib.h>
24 #include <Library/SerialPortLib.h>
25
26 /** Initialise the serial device hardware with default settings.
27
28 @retval RETURN_SUCCESS The serial device was initialised.
29 @retval RETURN_INVALID_PARAMETER One or more of the default settings
30 has an unsupported value.
31 **/
32 RETURN_STATUS
33 EFIAPI
34 SerialPortInitialize (
35 VOID
36 )
37 {
38 UINT64 BaudRate;
39 UINT32 ReceiveFifoDepth;
40 EFI_PARITY_TYPE Parity;
41 UINT8 DataBits;
42 EFI_STOP_BITS_TYPE StopBits;
43
44 BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);
45 ReceiveFifoDepth = 0; // Use default FIFO depth
46 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
47 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
48 StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
49
50 return PL011UartInitializePort (
51 (UINTN)PcdGet64 (PcdSerialRegisterBase),
52 PL011UartClockGetFreq(),
53 &BaudRate,
54 &ReceiveFifoDepth,
55 &Parity,
56 &DataBits,
57 &StopBits
58 );
59 }
60
61 /**
62 Write data to serial device.
63
64 @param Buffer Point of data buffer which need to be written.
65 @param NumberOfBytes Number of output bytes which are cached in Buffer.
66
67 @retval 0 Write data failed.
68 @retval !0 Actual number of bytes written to serial device.
69
70 **/
71 UINTN
72 EFIAPI
73 SerialPortWrite (
74 IN UINT8 *Buffer,
75 IN UINTN NumberOfBytes
76 )
77 {
78 return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
79 }
80
81 /**
82 Read data from serial device and save the data in buffer.
83
84 @param Buffer Point of data buffer which need to be written.
85 @param NumberOfBytes Number of output bytes which are cached in Buffer.
86
87 @retval 0 Read data failed.
88 @retval !0 Actual number of bytes read from serial device.
89
90 **/
91 UINTN
92 EFIAPI
93 SerialPortRead (
94 OUT UINT8 *Buffer,
95 IN UINTN NumberOfBytes
96 )
97 {
98 return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
99 }
100
101 /**
102 Check to see if any data is available to be read from the debug device.
103
104 @retval TRUE At least one byte of data is available to be read
105 @retval FALSE No data is available to be read
106
107 **/
108 BOOLEAN
109 EFIAPI
110 SerialPortPoll (
111 VOID
112 )
113 {
114 return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
115 }
116 /**
117 Set new attributes to PL011.
118
119 @param BaudRate The baud rate of the serial device. If the
120 baud rate is not supported, the speed will
121 be reduced down to the nearest supported one
122 and the variable's value will be updated
123 accordingly.
124 @param ReceiveFifoDepth The number of characters the device will
125 buffer on input. If the specified value is
126 not supported, the variable's value will
127 be reduced down to the nearest supported one.
128 @param Timeout If applicable, the number of microseconds the
129 device will wait before timing out a Read or
130 a Write operation.
131 @param Parity If applicable, this is the EFI_PARITY_TYPE
132 that is computed or checked as each character
133 is transmitted or received. If the device
134 does not support parity, the value is the
135 default parity value.
136 @param DataBits The number of data bits in each character
137 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number
138 of stop bits per character. If the device
139 does not support stop bits, the value is the
140 default stop bit value.
141
142 @retval EFI_SUCCESS All attributes were set correctly.
143 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported
144 value.
145
146 **/
147 RETURN_STATUS
148 EFIAPI
149 SerialPortSetAttributes (
150 IN OUT UINT64 *BaudRate,
151 IN OUT UINT32 *ReceiveFifoDepth,
152 IN OUT UINT32 *Timeout,
153 IN OUT EFI_PARITY_TYPE *Parity,
154 IN OUT UINT8 *DataBits,
155 IN OUT EFI_STOP_BITS_TYPE *StopBits
156 )
157 {
158 return PL011UartInitializePort (
159 (UINTN)PcdGet64 (PcdSerialRegisterBase),
160 PL011UartClockGetFreq(),
161 BaudRate,
162 ReceiveFifoDepth,
163 Parity,
164 DataBits,
165 StopBits
166 );
167 }
168
169 /**
170
171 Assert or deassert the control signals on a serial port.
172 The following control signals are set according their bit settings :
173 . Request to Send
174 . Data Terminal Ready
175
176 @param[in] Control The following bits are taken into account :
177 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the
178 "Request To Send" control signal if this bit is
179 equal to one/zero.
180 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert
181 the "Data Terminal Ready" control signal if this
182 bit is equal to one/zero.
183 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable
184 the hardware loopback if this bit is equal to
185 one/zero.
186 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.
187 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/
188 disable the hardware flow control based on CTS (Clear
189 To Send) and RTS (Ready To Send) control signals.
190
191 @retval RETURN_SUCCESS The new control bits were set on the device.
192 @retval RETURN_UNSUPPORTED The device does not support this operation.
193
194 **/
195 RETURN_STATUS
196 EFIAPI
197 SerialPortSetControl (
198 IN UINT32 Control
199 )
200 {
201 return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
202 }
203
204 /**
205
206 Retrieve the status of the control bits on a serial device.
207
208 @param[out] Control Status of the control bits on a serial device :
209
210 . EFI_SERIAL_DATA_CLEAR_TO_SEND,
211 EFI_SERIAL_DATA_SET_READY,
212 EFI_SERIAL_RING_INDICATE,
213 EFI_SERIAL_CARRIER_DETECT,
214 EFI_SERIAL_REQUEST_TO_SEND,
215 EFI_SERIAL_DATA_TERMINAL_READY
216 are all related to the DTE (Data Terminal Equipment)
217 and DCE (Data Communication Equipment) modes of
218 operation of the serial device.
219 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the
220 receive buffer is empty, 0 otherwise.
221 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the
222 transmit buffer is empty, 0 otherwise.
223 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if
224 the hardware loopback is enabled (the output feeds
225 the receive buffer), 0 otherwise.
226 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one
227 if a loopback is accomplished by software, else 0.
228 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to
229 one if the hardware flow control based on CTS (Clear
230 To Send) and RTS (Ready To Send) control signals is
231 enabled, 0 otherwise.
232
233 @retval RETURN_SUCCESS The control bits were read from the device.
234
235 **/
236 RETURN_STATUS
237 EFIAPI
238 SerialPortGetControl (
239 OUT UINT32 *Control
240 )
241 {
242 return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
243 }