ArmPlatformPkg: Redefine LcdPlatformGetTimings function
[mirror_edk2.git] / ArmPlatformPkg / Library / PL111Lcd / PL111Lcd.c
1 /** @file
2 This file contains the platform independent parts of PL111Lcd
3
4 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15 #include <Library/DebugLib.h>
16 #include <Library/IoLib.h>
17 #include <Library/LcdHwLib.h>
18 #include <Library/LcdPlatformLib.h>
19 #include <Library/MemoryAllocationLib.h>
20
21 #include "PL111Lcd.h"
22
23 /** Check for presence of PL111.
24
25 @retval EFI_SUCCESS Returns success if platform implements a
26 PL111 controller.
27
28 @retval EFI_NOT_FOUND PL111 display controller not found the plaform.
29 **/
30 EFI_STATUS
31 LcdIdentify (
32 VOID
33 )
34 {
35 DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",
36 PL111_REG_CLCD_PERIPH_ID_0));
37
38 // Check if this is a PL111
39 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&
40 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&
41 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&
42 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&
43 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&
44 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&
45 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&
46 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {
47 return EFI_SUCCESS;
48 }
49 return EFI_NOT_FOUND;
50 }
51
52 /** Initialize display.
53
54 @param[in] VramBaseAddress Address of the framebuffer.
55
56 @retval EFI_SUCCESS Initialization of display successful.
57 **/
58 EFI_STATUS
59 LcdInitialize (
60 IN EFI_PHYSICAL_ADDRESS VramBaseAddress
61 )
62 {
63 // Define start of the VRAM. This never changes for any graphics mode
64 MmioWrite32 (PL111_REG_LCD_UP_BASE, (UINT32)VramBaseAddress);
65 MmioWrite32 (PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
66
67 // Disable all interrupts from the PL111
68 MmioWrite32 (PL111_REG_LCD_IMSC, 0);
69
70 return EFI_SUCCESS;
71 }
72
73 /** Set requested mode of the display.
74
75 @param[in] ModeNumbe Display mode number.
76
77 @retval EFI_SUCCESS Display mode set successfuly.
78 @retval !(EFI_SUCCESS) Other errors.
79
80 **/
81 EFI_STATUS
82 LcdSetMode (
83 IN UINT32 ModeNumber
84 )
85 {
86 EFI_STATUS Status;
87 SCAN_TIMINGS *Horizontal;
88 SCAN_TIMINGS *Vertical;
89 UINT32 LcdControl;
90 LCD_BPP LcdBpp;
91
92 // Set the video mode timings and other relevant information
93 Status = LcdPlatformGetTimings (
94 ModeNumber,
95 &Horizontal,
96 &Vertical
97 );
98 if (EFI_ERROR (Status)) {
99 ASSERT_EFI_ERROR (Status);
100 return Status;
101 }
102
103 ASSERT (Horizontal != NULL);
104 ASSERT (Vertical != NULL);
105
106 Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);
107 if (EFI_ERROR (Status)) {
108 ASSERT_EFI_ERROR (Status);
109 return Status;
110 }
111
112 // Disable the CLCD_LcdEn bit
113 MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);
114
115 // Set Timings
116 MmioWrite32 (
117 PL111_REG_LCD_TIMING_0,
118 HOR_AXIS_PANEL (
119 Horizontal->BackPorch,
120 Horizontal->FrontPorch,
121 Horizontal->Sync,
122 Horizontal->Resolution
123 )
124 );
125
126 MmioWrite32 (
127 PL111_REG_LCD_TIMING_1,
128 VER_AXIS_PANEL (
129 Vertical->BackPorch,
130 Vertical->FrontPorch,
131 Vertical->Sync,
132 Vertical->Resolution
133 )
134 );
135
136 MmioWrite32 (
137 PL111_REG_LCD_TIMING_2,
138 CLK_SIG_POLARITY (Horizontal->Resolution)
139 );
140
141 MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);
142
143 // PL111_REG_LCD_CONTROL
144 LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) |
145 PL111_CTRL_LCD_TFT | PL111_CTRL_LCD_PWR | PL111_CTRL_BGR;
146 MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
147
148 return EFI_SUCCESS;
149 }
150
151 /** De-initializes the display.
152 */
153 VOID
154 LcdShutdown (
155 VOID
156 )
157 {
158 // Disable the controller
159 MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);
160 }