2 This file contains the platform independent parts of PL111Lcd
4 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Library/DebugLib.h>
16 #include <Library/IoLib.h>
17 #include <Library/LcdHwLib.h>
18 #include <Library/LcdPlatformLib.h>
19 #include <Library/MemoryAllocationLib.h>
23 /** Check for presence of PL111.
25 @retval EFI_SUCCESS Returns success if platform implements a
28 @retval EFI_NOT_FOUND PL111 display controller not found the plaform.
35 DEBUG ((EFI_D_WARN
, "Probing ID registers at 0x%lx for a PL111\n",
36 PL111_REG_CLCD_PERIPH_ID_0
));
38 // Check if this is a PL111
39 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0
) == PL111_CLCD_PERIPH_ID_0
&&
40 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1
) == PL111_CLCD_PERIPH_ID_1
&&
41 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2
) & 0xf) == PL111_CLCD_PERIPH_ID_2
&&
42 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3
) == PL111_CLCD_PERIPH_ID_3
&&
43 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0
) == PL111_CLCD_P_CELL_ID_0
&&
44 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1
) == PL111_CLCD_P_CELL_ID_1
&&
45 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2
) == PL111_CLCD_P_CELL_ID_2
&&
46 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3
) == PL111_CLCD_P_CELL_ID_3
) {
52 /** Initialize display.
54 @param[in] VramBaseAddress Address of the framebuffer.
56 @retval EFI_SUCCESS Initialization of display successful.
60 IN EFI_PHYSICAL_ADDRESS VramBaseAddress
63 // Define start of the VRAM. This never changes for any graphics mode
64 MmioWrite32 (PL111_REG_LCD_UP_BASE
, (UINT32
)VramBaseAddress
);
65 MmioWrite32 (PL111_REG_LCD_LP_BASE
, 0); // We are not using a double buffer
67 // Disable all interrupts from the PL111
68 MmioWrite32 (PL111_REG_LCD_IMSC
, 0);
73 /** Set requested mode of the display.
75 @param[in] ModeNumbe Display mode number.
77 @retval EFI_SUCCESS Display mode set successfuly.
78 @retval !(EFI_SUCCESS) Other errors.
87 SCAN_TIMINGS
*Horizontal
;
88 SCAN_TIMINGS
*Vertical
;
92 // Set the video mode timings and other relevant information
93 Status
= LcdPlatformGetTimings (
98 if (EFI_ERROR (Status
)) {
99 ASSERT_EFI_ERROR (Status
);
103 ASSERT (Horizontal
!= NULL
);
104 ASSERT (Vertical
!= NULL
);
106 Status
= LcdPlatformGetBpp (ModeNumber
, &LcdBpp
);
107 if (EFI_ERROR (Status
)) {
108 ASSERT_EFI_ERROR (Status
);
112 // Disable the CLCD_LcdEn bit
113 MmioAnd32 (PL111_REG_LCD_CONTROL
, ~PL111_CTRL_LCD_EN
);
117 PL111_REG_LCD_TIMING_0
,
119 Horizontal
->BackPorch
,
120 Horizontal
->FrontPorch
,
122 Horizontal
->Resolution
127 PL111_REG_LCD_TIMING_1
,
130 Vertical
->FrontPorch
,
137 PL111_REG_LCD_TIMING_2
,
138 CLK_SIG_POLARITY (Horizontal
->Resolution
)
141 MmioWrite32 (PL111_REG_LCD_TIMING_3
, 0);
143 // PL111_REG_LCD_CONTROL
144 LcdControl
= PL111_CTRL_LCD_EN
| PL111_CTRL_LCD_BPP (LcdBpp
) |
145 PL111_CTRL_LCD_TFT
| PL111_CTRL_LCD_PWR
| PL111_CTRL_BGR
;
146 MmioWrite32 (PL111_REG_LCD_CONTROL
, LcdControl
);
151 /** De-initializes the display.
158 // Disable the controller
159 MmioAnd32 (PL111_REG_LCD_CONTROL
, ~PL111_CTRL_LCD_EN
);