ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S

   1 //
   2 //  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AsmMacroIoLibV8.h>
  15
  16 ASM_FUNC(_ModuleEntryPoint)
  17   // Do early platform specific actions
  18   bl    ASM_PFX(ArmPlatformPeiBootAction)
  19
  20 // NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
  21 //       and configure the system accordingly. EL2 is default if possible.
  22 // If we started in EL3 we need to switch and run at EL2.
  23 // If we are running at EL2 stay in EL2
  24 // If we are starting at EL1 stay in EL1.
  25
  26 // If started at EL3 Sec is run and switches to EL2 before jumping to PEI.
  27 // If started at EL1 or EL2 Sec jumps directly to PEI without making any
  28 // changes.
  29
  30 // Which EL are we running at? Every EL needs some level of setup...
  31 // We should not run this code in EL3
  32   EL1_OR_EL2(x0)
  33 1:bl    ASM_PFX(SetupExceptionLevel1)
  34   b     ASM_PFX(MainEntryPoint)
  35 2:bl    ASM_PFX(SetupExceptionLevel2)
  36   b     ASM_PFX(MainEntryPoint)
  37
  38 ASM_PFX(MainEntryPoint):
  39   // Identify CPU ID
  40   bl    ASM_PFX(ArmReadMpidr)
  41   // Keep a copy of the MpId register value
  42   mov   x5, x0
  43
  44   // Is it the Primary Core ?
  45   bl    ASM_PFX(ArmPlatformIsPrimaryCore)
  46
  47   // Get the top of the primary stacks (and the base of the secondary stacks)
  48   MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
  49
  50   // x0 is equal to 1 if I am the primary core
  51   cmp   x0, #1
  52   b.eq   _SetupPrimaryCoreStack
  53
  54 _SetupSecondaryCoreStack:
  55   // x1 contains the base of the secondary stacks
  56
  57   // Get the Core Position
  58   mov   x6, x1      // Save base of the secondary stacks
  59   mov   x0, x5
  60   bl    ASM_PFX(ArmPlatformGetCorePosition)
  61   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
  62   add   x0, x0, #1
  63
  64   // StackOffset = CorePos * StackSize
  65   MOV32 (x2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
  66   mul   x0, x0, x2
  67   // SP = StackBase + StackOffset
  68   add   sp, x6, x0
  69
  70 _PrepareArguments:
  71   // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
  72   MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
  73   ldr   x1, [x2, #8]
  74
  75   // Move sec startup address into a data register
  76   // Ensure we're jumping to FV version of the code (not boot remapped alias)
  77   ldr   x3, =ASM_PFX(CEntryPoint)
  78
  79   // Set the frame pointer to NULL so any backtraces terminate here
  80   mov   x29, xzr
  81
  82   // Jump to PrePeiCore C code
  83   //    x0 = mp_id
  84   //    x1 = pei_core_address
  85   mov   x0, x5
  86   blr   x3
  87
  88 _SetupPrimaryCoreStack:
  89   mov   sp, x1
  90   MOV64 (x8, FixedPcdGet64 (PcdCPUCoresStackBase))
  91   MOV64 (x9, FixedPcdGet32 (PcdInitValueInTempStack) |\
  92              FixedPcdGet32 (PcdInitValueInTempStack) << 32)
  93 0:stp   x9, x9, [x8], #16
  94   cmp   x8, x1
  95   b.lt  0b
  96   b     _PrepareArguments