ArmPlatformPkg/PrePeiCore/MainUniCore.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include "PrePeiCore.h"
  16
  17 VOID
  18 EFIAPI
  19 SecondaryMain (
  20   IN UINTN MpId
  21   )
  22 {
  23   ASSERT(FALSE);
  24 }
  25
  26 VOID
  27 EFIAPI
  28 PrimaryMain (
  29   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
  30   )
  31 {
  32   EFI_SEC_PEI_HAND_OFF        SecCoreData;
  33   UINTN                       PpiListSize;
  34   EFI_PEI_PPI_DESCRIPTOR      *PpiList;
  35   UINTN                       TemporaryRamBase;
  36   UINTN                       TemporaryRamSize;
  37
  38   CreatePpiList (&PpiListSize, &PpiList);
  39
  40   // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
  41   // the base of the primary core stack
  42   PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
  43   TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
  44   TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
  45
  46   // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
  47   // to ensure the stack pointer is 4-byte aligned.
  48   TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));
  49
  50   //
  51   // Bind this information into the SEC hand-off state
  52   // Note: this must be in sync with the stuff in the asm file
  53   // Note also:  HOBs (pei temp ram) MUST be above stack
  54   //
  55   SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);
  56   SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
  57   SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
  58   SecCoreData.TemporaryRamBase       = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
  59   SecCoreData.TemporaryRamSize       = TemporaryRamSize;
  60   SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;
  61   SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;
  62   SecCoreData.StackBase              = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);
  63   SecCoreData.StackSize              = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;
  64
  65   // Jump to PEI core entry point
  66   (PeiCoreEntryPoint)(&SecCoreData, PpiList);
  67 }