ArmPlatformPkg/PrePeiCore/PrePeiCore.c

   1 /** @file
   2 *  Main file supporting the transition to PEI Core in Normal World for Versatile Express
   3 *
   4 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 **/
   9
  10 #include <Library/BaseLib.h>
  11 #include <Library/DebugAgentLib.h>
  12 #include <Library/ArmLib.h>
  13
  14 #include "PrePeiCore.h"
  15
  16 CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };
  17
  18 CONST EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {
  19   {
  20     EFI_PEI_PPI_DESCRIPTOR_PPI,
  21     &gEfiTemporaryRamSupportPpiGuid,
  22     (VOID *) &mTemporaryRamSupportPpi
  23   }
  24 };
  25
  26 VOID
  27 CreatePpiList (
  28   OUT UINTN                   *PpiListSize,
  29   OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
  30   )
  31 {
  32   EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;
  33   UINTN                   PlatformPpiListSize;
  34   UINTN                   ListBase;
  35   EFI_PEI_PPI_DESCRIPTOR *LastPpi;
  36
  37   // Get the Platform PPIs
  38   PlatformPpiListSize = 0;
  39   ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
  40
  41   // Copy the Common and Platform PPis in Temporary Memory
  42   ListBase = PcdGet64 (PcdCPUCoresStackBase);
  43   CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
  44   CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);
  45
  46   // Set the Terminate flag on the last PPI entry
  47   LastPpi = (EFI_PEI_PPI_DESCRIPTOR*)ListBase + ((sizeof(gCommonPpiTable) + PlatformPpiListSize) / sizeof(EFI_PEI_PPI_DESCRIPTOR)) - 1;
  48   LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
  49
  50   *PpiList     = (EFI_PEI_PPI_DESCRIPTOR*)ListBase;
  51   *PpiListSize = sizeof(gCommonPpiTable) + PlatformPpiListSize;
  52 }
  53
  54 VOID
  55 CEntryPoint (
  56   IN  UINTN                     MpId,
  57   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
  58   )
  59 {
  60   // Data Cache enabled on Primary core when MMU is enabled.
  61   ArmDisableDataCache ();
  62   // Invalidate Data cache
  63   ArmInvalidateDataCache ();
  64   // Invalidate instruction cache
  65   ArmInvalidateInstructionCache ();
  66   // Enable Instruction Caches on all cores.
  67   ArmEnableInstructionCache ();
  68
  69   //
  70   // Note: Doesn't have to Enable CPU interface in non-secure world,
  71   // as Non-secure interface is already enabled in Secure world.
  72   //
  73
  74   // Write VBAR - The Exception Vector table must be aligned to its requirement
  75   // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure
  76   // 'Align=4K' is defined into your FDF for this module.
  77   ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);
  78   ArmWriteVBar ((UINTN)PeiVectorTable);
  79
  80   // Enable Floating Point
  81   if (FixedPcdGet32 (PcdVFPEnabled)) {
  82     ArmEnableVFP ();
  83   }
  84
  85   //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.
  86
  87   // If not primary Jump to Secondary Main
  88   if (ArmPlatformIsPrimaryCore (MpId)) {
  89     // Initialize the Debug Agent for Source Level Debugging
  90     InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
  91     SaveAndSetDebugTimerInterrupt (TRUE);
  92
  93     // Initialize the platform specific controllers
  94     ArmPlatformInitialize (MpId);
  95
  96     // Goto primary Main.
  97     PrimaryMain (PeiCoreEntryPoint);
  98   } else {
  99     SecondaryMain (MpId);
 100   }
 101
 102   // PEI Core should always load and never return
 103   ASSERT (FALSE);
 104 }
 105
 106 EFI_STATUS
 107 EFIAPI
 108 PrePeiCoreTemporaryRamSupport (
 109   IN CONST EFI_PEI_SERVICES   **PeiServices,
 110   IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
 111   IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
 112   IN UINTN                    CopySize
 113   )
 114 {
 115   VOID                             *OldHeap;
 116   VOID                             *NewHeap;
 117   VOID                             *OldStack;
 118   VOID                             *NewStack;
 119   UINTN                            HeapSize;
 120
 121   HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT);
 122
 123   OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
 124   NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));
 125
 126   OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize);
 127   NewStack = (VOID*)(UINTN)PermanentMemoryBase;
 128
 129   //
 130   // Migrate the temporary memory stack to permanent memory stack.
 131   //
 132   CopyMem (NewStack, OldStack, CopySize - HeapSize);
 133
 134   //
 135   // Migrate the temporary memory heap to permanent memory heap.
 136   //
 137   CopyMem (NewHeap, OldHeap, HeapSize);
 138
 139   SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack);
 140
 141   return EFI_SUCCESS;
 142 }