ArmPlatformPkg/PrePeiCore/PrePeiCore.h

   1 /** @file
   2 *  Main file supporting the transition to PEI Core in Normal World for Versatile Express
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15 #ifndef __PREPEICORE_H_
  16 #define __PREPEICORE_H_
  17
  18 #include <Library/DebugLib.h>
  19 #include <Library/PcdLib.h>
  20
  21 #include <PiPei.h>
  22 #include <Ppi/TemporaryRamSupport.h>
  23
  24
  25 EFI_STATUS
  26 EFIAPI
  27 SecTemporaryRamSupport (
  28   IN CONST EFI_PEI_SERVICES   **PeiServices,
  29   IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
  30   IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
  31   IN UINTN                    CopySize
  32   );
  33
  34 VOID
  35 SecSwitchStack (
  36   INTN    StackDelta
  37   );
  38
  39 // Vector Table for Pei Phase
  40 VOID  PeiVectorTable (VOID);
  41
  42 VOID
  43 EFIAPI
  44 PrimaryMain (
  45   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
  46   );
  47
  48 /*
  49  * This is the main function for secondary cores. They loop around until a non Null value is written to
  50  * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
  51  * Note:The secondary cores, while executing secondary_main, assumes that:
  52  *      : SGI 0 is configured as Non-secure interrupt
  53  *      : Priority Mask is configured to allow SGI 0
  54  *      : Interrupt Distributor and CPU interfaces are enabled
  55  *
  56  */
  57 VOID
  58 EFIAPI
  59 SecondaryMain (
  60   IN UINTN MpId
  61   );
  62
  63 #endif