2 * Main file supporting the transition to PEI Core in Normal World for Versatile Express
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __PREPEICORE_H_
16 #define __PREPEICORE_H_
19 #include <Ppi/TemporaryRamSupport.h>
24 SecTemporaryRamSupport (
25 IN CONST EFI_PEI_SERVICES
**PeiServices
,
26 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
27 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
36 // Vector Table for Pei Phase
37 VOID
PeiVectorTable (VOID
);
42 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
46 * This is the main function for secondary cores. They loop around until a non Null value is written to
47 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
48 * Note:The secondary cores, while executing secondary_main, assumes that:
49 * : SGI 0 is configured as Non-secure interrupt
50 * : Priority Mask is configured to allow SGI 0
51 * : Interrupt Distributor and CPU interfaces are enabled