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ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64
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1 //
2 // Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3 //
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
8 //
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 //
12 //
13
14 #include <AsmMacroIoLib.h>
15 #include <Base.h>
16 #include <Library/PcdLib.h>
17 #include <AutoGen.h>
18
19 #include <Chipset/ArmV7.h>
20
21 .text
22 .align 3
23
24 GCC_ASM_IMPORT(CEntryPoint)
25 GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
26 GCC_ASM_IMPORT(ArmReadMpidr)
27 GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
28 GCC_ASM_IMPORT(ArmPlatformStackSet)
29 GCC_ASM_EXPORT(_ModuleEntryPoint)
30
31 StartupAddr: .word CEntryPoint
32
33
34 ASM_PFX(_ModuleEntryPoint):
35 // Do early platform specific actions
36 bl ASM_PFX(ArmPlatformPeiBootAction)
37
38 // Get ID of this CPU in Multicore system
39 bl ASM_PFX(ArmReadMpidr)
40 // Keep a copy of the MpId register value
41 mov r6, r0
42
43 _SetSVCMode:
44 // Enter SVC mode, Disable FIQ and IRQ
45 mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)
46 msr CPSR_c, r1
47
48 // Check if we can install the stack at the top of the System Memory or if we need
49 // to install the stacks at the bottom of the Firmware Device (case the FD is located
50 // at the top of the DRAM)
51 _SetupStackPosition:
52 // Compute Top of System Memory
53 LoadConstantToReg (FixedPcdGet64 (PcdSystemMemoryBase), r1)
54 LoadConstantToReg (FixedPcdGet64 (PcdSystemMemorySize), r2)
55 sub r2, r2, #1
56 add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
57
58 // Calculate Top of the Firmware Device
59 LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
60 LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
61 sub r3, r3, #1
62 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
63
64 // UEFI Memory Size (stacks are allocated in this region)
65 LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
66
67 //
68 // Reserve the memory for the UEFI region (contain stacks on its top)
69 //
70
71 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory
72 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
73 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
74 cmp r0, r4
75 bge _SetupStack
76
77 // Case the top of stacks is the FdBaseAddress
78 mov r1, r2
79
80 _SetupStack:
81 // r1 contains the top of the stack (and the UEFI Memory)
82
83 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
84 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
85 // top of the memory space)
86 adds r7, r1, #1
87 bcs _SetupOverflowStack
88
89 _SetupAlignedStack:
90 mov r1, r7
91 b _GetBaseUefiMemory
92
93 _SetupOverflowStack:
94 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
95 // aligned (4KB)
96 LoadConstantToReg (EFI_PAGE_MASK, r7)
97 and r7, r7, r1
98 sub r1, r1, r7
99
100 _GetBaseUefiMemory:
101 // Calculate the Base of the UEFI Memory
102 sub r7, r1, r4
103
104 _GetStackBase:
105 // r1 = The top of the Mpcore Stacks
106 // Stack for the primary core = PrimaryCoreStack
107 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
108 sub r8, r1, r2
109
110 // Stack for the secondary core = Number of Cores - 1
111 LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
112 sub r0, r0, #1
113 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
114 mul r1, r1, r0
115 sub r8, r8, r1
116
117 // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)
118 mov r0, r8
119 mov r1, r6
120 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
121 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
122 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
123 bl ASM_PFX(ArmPlatformStackSet)
124
125 // Is it the Primary Core ?
126 mov r0, r6
127 bl ASM_PFX(ArmPlatformIsPrimaryCore)
128 cmp r0, #1
129 bne _PrepareArguments
130
131 _ReserveGlobalVariable:
132 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)
133 // InitializePrimaryStack($GlobalVariableSize, $Tmp1)
134 InitializePrimaryStack(r0, r1)
135
136 _PrepareArguments:
137 mov r0, r6
138 mov r1, r7
139 mov r2, r8
140 mov r3, sp
141
142 // Move sec startup address into a data register
143 // Ensure we're jumping to FV version of the code (not boot remapped alias)
144 ldr r4, StartupAddr
145
146 // Jump to PrePiCore C code
147 // r0 = MpId
148 // r1 = UefiMemoryBase
149 // r2 = StacksBase
150 // r3 = GlobalVariableBase
151 blx r4
152
153 _NeverReturn:
154 b _NeverReturn
155