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1 //
2 // Copyright (c) 2011-2015, ARM Limited. All rights reserved.
3 //
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
8 //
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 //
12 //
13
14 #include <AutoGen.h>
15 #include <Chipset/ArmV7.h>
16
17 INCLUDE AsmMacroIoLib.inc
18
19 IMPORT CEntryPoint
20 IMPORT ArmPlatformIsPrimaryCore
21 IMPORT ArmReadMpidr
22 IMPORT ArmPlatformPeiBootAction
23 IMPORT ArmPlatformStackSet
24
25 EXPORT _ModuleEntryPoint
26 EXPORT mSystemMemoryEnd
27
28 PRESERVE8
29 AREA PrePiCoreEntryPoint, CODE, READONLY
30
31 StartupAddr DCD CEntryPoint
32 mSystemMemoryEnd DCQ 0
33
34 _ModuleEntryPoint
35 // Do early platform specific actions
36 bl ArmPlatformPeiBootAction
37
38 // Get ID of this CPU in Multicore system
39 bl ArmReadMpidr
40 // Keep a copy of the MpId register value
41 mov r8, r0
42
43 _SetSVCMode
44 // Enter SVC mode, Disable FIQ and IRQ
45 mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)
46 msr CPSR_c, r1
47
48 // Check if we can install the stack at the top of the System Memory or if we need
49 // to install the stacks at the bottom of the Firmware Device (case the FD is located
50 // at the top of the DRAM)
51 _SystemMemoryEndInit
52 ldr r1, mSystemMemoryEnd
53
54 // Is mSystemMemoryEnd initialized?
55 cmp r1, #0
56 bne _SetupStackPosition
57
58 mov32 r1, FixedPcdGet32(PcdSystemMemoryBase)
59 mov32 r2, FixedPcdGet32(PcdSystemMemorySize)
60 sub r2, r2, #1
61 add r1, r1, r2
62 // Update the global variable
63 adr r2, mSystemMemoryEnd
64 str r1, [r2]
65
66 _SetupStackPosition
67 // r1 = SystemMemoryTop
68
69 // Calculate Top of the Firmware Device
70 mov32 r2, FixedPcdGet32(PcdFdBaseAddress)
71 mov32 r3, FixedPcdGet32(PcdFdSize)
72 sub r3, r3, #1
73 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
74
75 // UEFI Memory Size (stacks are allocated in this region)
76 mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)
77
78 //
79 // Reserve the memory for the UEFI region (contain stacks on its top)
80 //
81
82 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory
83 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
84 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
85 cmp r0, r4
86 bge _SetupStack
87
88 // Case the top of stacks is the FdBaseAddress
89 mov r1, r2
90
91 _SetupStack
92 // r1 contains the top of the stack (and the UEFI Memory)
93
94 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
95 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
96 // top of the memory space)
97 adds r9, r1, #1
98 bcs _SetupOverflowStack
99
100 _SetupAlignedStack
101 mov r1, r9
102 b _GetBaseUefiMemory
103
104 _SetupOverflowStack
105 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
106 // aligned (4KB)
107 mov32 r9, EFI_PAGE_MASK
108 and r9, r9, r1
109 sub r1, r1, r9
110
111 _GetBaseUefiMemory
112 // Calculate the Base of the UEFI Memory
113 sub r9, r1, r4
114
115 _GetStackBase
116 // r1 = The top of the Mpcore Stacks
117 // Stack for the primary core = PrimaryCoreStack
118 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
119 sub r10, r1, r2
120
121 // Stack for the secondary core = Number of Cores - 1
122 mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
123 sub r10, r10, r1
124
125 // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
126 mov r0, r10
127 mov r1, r8
128 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
129 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
130 mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
131 bl ArmPlatformStackSet
132
133 // Is it the Primary Core ?
134 mov r0, r8
135 bl ArmPlatformIsPrimaryCore
136 cmp r0, #1
137 bne _PrepareArguments
138
139 _PrepareArguments
140 mov r0, r8
141 mov r1, r9
142 mov r2, r10
143
144 // Move sec startup address into a data register
145 // Ensure we're jumping to FV version of the code (not boot remapped alias)
146 ldr r4, StartupAddr
147
148 // Jump to PrePiCore C code
149 // r0 = MpId
150 // r1 = UefiMemoryBase
151 // r2 = StacksBase
152 blx r4
153
154 _NeverReturn
155 b _NeverReturn
156
157 END