ArmPlatformPkg/PrePi/MainMPCore.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include "PrePi.h"
  16
  17 #include <Library/ArmGicLib.h>
  18 #include <Library/ArmMPCoreMailBoxLib.h>
  19 #include <Chipset/ArmV7.h>
  20
  21 VOID
  22 PrimaryMain (
  23   IN  UINTN                     UefiMemoryBase,
  24   IN  UINT64                    StartTimeStamp
  25   )
  26 {
  27   // Enable the GIC Distributor
  28   ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
  29
  30   // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization
  31   if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {
  32     // Sending SGI to all the Secondary CPU interfaces
  33     ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
  34   }
  35
  36   PrePiMain (UefiMemoryBase, StartTimeStamp);
  37
  38   // We must never return
  39   ASSERT(FALSE);
  40 }
  41
  42 VOID
  43 SecondaryMain (
  44   IN  UINTN                     MpId
  45   )
  46 {
  47   // Function pointer to Secondary Core entry point
  48   VOID (*secondary_start)(VOID);
  49   UINTN secondary_entry_addr=0;
  50
  51   // Clear Secondary cores MailBox
  52   ArmClearMPCoreMailbox();
  53
  54   while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
  55     ArmCallWFI();
  56     // Acknowledge the interrupt and send End of Interrupt signal.
  57     ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
  58   }
  59
  60   secondary_start = (VOID (*)())secondary_entry_addr;
  61
  62   // Jump to secondary core entry point.
  63   secondary_start();
  64
  65   // The secondaries shouldn't reach here
  66   ASSERT(FALSE);
  67 }