ArmPlatformPkg/Sec/Arm/SecEntryPoint.S

   1 //
   2 //  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AutoGen.h>
  15 #include <AsmMacroIoLib.h>
  16 #include "SecInternal.h"
  17
  18 .text
  19 .align 3
  20
  21 GCC_ASM_IMPORT(CEntryPoint)
  22 GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
  23 GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
  24 GCC_ASM_IMPORT(ArmPlatformSecBootAction)
  25 GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
  26 GCC_ASM_IMPORT(ArmDisableInterrupts)
  27 GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
  28 GCC_ASM_IMPORT(ArmReadMpidr)
  29 GCC_ASM_IMPORT(ArmCallWFE)
  30 GCC_ASM_EXPORT(_ModuleEntryPoint)
  31
  32 StartupAddr:        .word       ASM_PFX(CEntryPoint)
  33
  34 ASM_PFX(_ModuleEntryPoint):
  35   // First ensure all interrupts are disabled
  36   bl    ASM_PFX(ArmDisableInterrupts)
  37
  38   // Ensure that the MMU and caches are off
  39   bl    ASM_PFX(ArmDisableCachesAndMmu)
  40
  41   // By default, we are doing a cold boot
  42   mov   r10, #ARM_SEC_COLD_BOOT
  43
  44   // Jump to Platform Specific Boot Action function
  45   blx   ASM_PFX(ArmPlatformSecBootAction)
  46
  47 _IdentifyCpu:
  48   // Identify CPU ID
  49   bl    ASM_PFX(ArmReadMpidr)
  50   // Keep a copy of the MpId register value
  51   mov   r9, r0
  52
  53   // Is it the Primary Core ?
  54   bl    ASM_PFX(ArmPlatformIsPrimaryCore)
  55   cmp   r0, #1
  56   // Only the primary core initialize the memory (SMC)
  57   beq   _InitMem
  58
  59 _WaitInitMem:
  60   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  61   // Otherwise we have to wait the Primary Core to finish the initialization
  62   cmp   r10, #ARM_SEC_COLD_BOOT
  63   bne   _SetupSecondaryCoreStack
  64
  65   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
  66   bl    ASM_PFX(ArmCallWFE)
  67   // Now the Init Mem is initialized, we setup the secondary core stacks
  68   b     _SetupSecondaryCoreStack
  69
  70 _InitMem:
  71   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  72   cmp   r10, #ARM_SEC_COLD_BOOT
  73   bne   _SetupPrimaryCoreStack
  74
  75   // Initialize Init Boot Memory
  76   bl    ASM_PFX(ArmPlatformSecBootMemoryInit)
  77
  78 _SetupPrimaryCoreStack:
  79   // Get the top of the primary stacks (and the base of the secondary stacks)
  80   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  81   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  82   add   r1, r1, r2
  83
  84   LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
  85
  86   // The reserved space for global variable must be 8-bytes aligned for pushing
  87   // 64-bit variable on the stack
  88   SetPrimaryStack (r1, r2, r3)
  89   b     _PrepareArguments
  90
  91 _SetupSecondaryCoreStack:
  92   // Get the top of the primary stacks (and the base of the secondary stacks)
  93   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  94   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  95   add   r6, r1, r2
  96
  97   // Get the Core Position
  98   mov   r0, r9
  99   bl    ASM_PFX(ArmPlatformGetCorePosition)
 100   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
 101   add   r0, r0, #1
 102
 103   // StackOffset = CorePos * StackSize
 104   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
 105   mul   r0, r0, r2
 106   // SP = StackBase + StackOffset
 107   add   sp, r6, r0
 108
 109 _PrepareArguments:
 110   // Move sec startup address into a data register
 111   // Ensure we're jumping to FV version of the code (not boot remapped alias)
 112   ldr   r3, StartupAddr
 113
 114   // Jump to SEC C code
 115   //    r0 = mp_id
 116   //    r1 = Boot Mode
 117   mov   r0, r9
 118   mov   r1, r10
 119   blx   r3
 120
 121 _NeverReturn:
 122   b _NeverReturn