ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm

   1 //
   2 //  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AutoGen.h>
  15 #include <AsmMacroIoLib.h>
  16 #include "SecInternal.h"
  17
  18   INCLUDE AsmMacroIoLib.inc
  19
  20   IMPORT  CEntryPoint
  21   IMPORT  ArmPlatformIsPrimaryCore
  22   IMPORT  ArmPlatformSecBootAction
  23   IMPORT  ArmPlatformSecBootMemoryInit
  24   IMPORT  ArmDisableInterrupts
  25   IMPORT  ArmDisableCachesAndMmu
  26   IMPORT  ArmReadMpidr
  27   IMPORT  ArmCallWFE
  28   EXPORT  _ModuleEntryPoint
  29
  30   PRESERVE8
  31   AREA    SecEntryPoint, CODE, READONLY
  32
  33 StartupAddr        DCD      CEntryPoint
  34
  35 _ModuleEntryPoint FUNCTION
  36   // First ensure all interrupts are disabled
  37   bl    ArmDisableInterrupts
  38
  39   // Ensure that the MMU and caches are off
  40   bl    ArmDisableCachesAndMmu
  41
  42   // By default, we are doing a cold boot
  43   mov   r10, #ARM_SEC_COLD_BOOT
  44
  45   // Jump to Platform Specific Boot Action function
  46   blx   ArmPlatformSecBootAction
  47
  48 _IdentifyCpu
  49   // Identify CPU ID
  50   bl    ArmReadMpidr
  51   // Keep a copy of the MpId register value
  52   mov   r9, r0
  53
  54   // Is it the Primary Core ?
  55   bl    ArmPlatformIsPrimaryCore
  56   cmp   r0, #1
  57   // Only the primary core initialize the memory (SMC)
  58   beq   _InitMem
  59
  60 _WaitInitMem
  61   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  62   // Otherwise we have to wait the Primary Core to finish the initialization
  63   cmp   r10, #ARM_SEC_COLD_BOOT
  64   bne   _SetupSecondaryCoreStack
  65
  66   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
  67   bl    ArmCallWFE
  68   // Now the Init Mem is initialized, we setup the secondary core stacks
  69   b     _SetupSecondaryCoreStack
  70
  71 _InitMem
  72   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  73   cmp   r10, #ARM_SEC_COLD_BOOT
  74   bne   _SetupPrimaryCoreStack
  75
  76   // Initialize Init Boot Memory
  77   bl    ArmPlatformSecBootMemoryInit
  78
  79 _SetupPrimaryCoreStack
  80   // Get the top of the primary stacks (and the base of the secondary stacks)
  81   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  82   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  83   add   r1, r1, r2
  84
  85   LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
  86
  87   // The reserved space for global variable must be 8-bytes aligned for pushing
  88   // 64-bit variable on the stack
  89   SetPrimaryStack (r1, r2, r3)
  90   b     _PrepareArguments
  91
  92 _SetupSecondaryCoreStack
  93   // Get the top of the primary stacks (and the base of the secondary stacks)
  94   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  95   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  96   add   r1, r1, r2
  97
  98   // Get the Core Position (ClusterId * 4) + CoreId
  99   GetCorePositionFromMpId(r0, r9, r2)
 100   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
 101   add   r0, r0, #1
 102
 103   // StackOffset = CorePos * StackSize
 104   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
 105   mul   r0, r0, r2
 106   // SP = StackBase + StackOffset
 107   add   sp, r1, r0
 108
 109 _PrepareArguments
 110   // Move sec startup address into a data register
 111   // Ensure we're jumping to FV version of the code (not boot remapped alias)
 112   ldr   r3, StartupAddr
 113
 114   // Jump to SEC C code
 115   //    r0 = mp_id
 116   //    r1 = Boot Mode
 117   mov   r0, r9
 118   mov   r1, r10
 119   blx   r3
 120   ENDFUNC
 121
 122 _NeverReturn
 123   b _NeverReturn
 124   END