ArmPlatformPkg: Move the Secure Monitor initialization into a separate 'ArmTrustedMon...
[mirror_edk2.git] / ArmPlatformPkg / Sec / Helper.asm
1 //
2 // Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3 //
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
8 //
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 //
12 //
13
14 EXPORT return_from_exception
15 EXPORT enter_monitor_mode
16 EXPORT copy_cpsr_into_spsr
17 EXPORT set_non_secure_mode
18
19 AREA Helper, CODE, READONLY
20
21 // arg0: Secure Monitor mode stack
22 enter_monitor_mode
23 mov r2, lr // Save current lr
24
25 mrs r1, cpsr // Save current mode (SVC) in r1
26 bic r3, r1, #0x1f // Clear all mode bits
27 orr r3, r3, #0x16 // Set bits for Monitor mode
28 msr cpsr_cxsf, r3 // We are now in Monitor Mode
29
30 mov sp, r0 // Use the passed sp
31 mov lr, r2 // Use the same lr as before
32
33 msr spsr_cxsf, r1 // Use saved mode for the MOVS jump to the kernel
34 bx lr
35
36 // We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
37 // When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into
38 // 'pc'; we will not change the CPSR flag and it will crash.
39 // The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.
40 return_from_exception
41 adr lr, returned_exception
42 movs pc, lr
43 returned_exception // We are now in non-secure state
44 bx r0
45
46 // Save the current Program Status Register (PSR) into the Saved PSR
47 copy_cpsr_into_spsr
48 mrs r0, cpsr
49 msr spsr_cxsf, r0
50 bx lr
51
52 // Set the Non Secure Mode
53 set_non_secure_mode
54 push { r1 }
55 and r0, r0, #0x1f // Keep only the mode bits
56 mrs r1, spsr // Read the spsr
57 bic r1, r1, #0x1f // Clear all mode bits
58 orr r1, r1, r0
59 msr spsr_cxsf, r1 // write back spsr (may have caused a mode switch)
60 isb
61 pop { r1 }
62 bx lr // return (hopefully thumb-safe!)
63
64 dead
65 B dead
66
67 END