ArmPlatformPkg/Sec/Helper.asm

   1 //
   2 //  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14     EXPORT  return_from_exception
  15     EXPORT  enter_monitor_mode
  16     EXPORT  copy_cpsr_into_spsr
  17     EXPORT  set_non_secure_mode
  18
  19     AREA   Helper, CODE, READONLY
  20
  21 // r0: Monitor World EntryPoint
  22 // r1: MpId
  23 // r2: Secure Monitor mode stack
  24 enter_monitor_mode
  25     cmp     r2, #0                      // If a Secure Monitor stack base has not been defined then use the Secure stack
  26     moveq   r2, sp
  27
  28     mrs     r4, cpsr                    // Save current mode (SVC) in r4
  29     bic     r3, r4, #0x1f               // Clear all mode bits
  30     orr     r3, r3, #0x16               // Set bits for Monitor mode
  31     msr     cpsr_cxsf, r3               // We are now in Monitor Mode
  32
  33     mov     sp, r2                      // Set the stack of the Monitor Mode
  34
  35     mov     lr, r0                      // Use the pass entrypoint as lr
  36
  37     msr     spsr_cxsf, r4               // Use saved mode for the MOVS jump to the kernel
  38
  39     mov     r4, r0                      // Swap EntryPoint and MpId registers
  40     mov     r0, r1
  41
  42     bx      r4
  43
  44 // We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
  45 // When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into
  46 // 'pc'; we will not change the CPSR flag and it will crash.
  47 // The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.
  48 return_from_exception
  49     adr     lr, returned_exception
  50     movs    pc, lr
  51 returned_exception                           // We are now in non-secure state
  52     bx      r0
  53
  54 // Save the current Program Status Register (PSR) into the Saved PSR
  55 copy_cpsr_into_spsr
  56     mrs     r0, cpsr
  57     msr     spsr_cxsf, r0
  58     bx      lr
  59
  60 // Set the Non Secure Mode
  61 set_non_secure_mode
  62     push    { r1 }
  63     and     r0, r0, #0x1f     // Keep only the mode bits
  64     mrs     r1, spsr          // Read the spsr
  65     bic     r1, r1, #0x1f     // Clear all mode bits
  66     orr     r1, r1, r0
  67     msr     spsr_cxsf, r1     // write back spsr (may have caused a mode switch)
  68     isb
  69     pop     { r1 }
  70     bx      lr                // return (hopefully thumb-safe!)
  71
  72 dead
  73     B       dead
  74
  75     END