ArmPlatformPkg/Sec/Sec.c

   1 /** @file
   2 *  Main file supporting the SEC Phase on ARM Platforms
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #include <Library/DebugAgentLib.h>
  17 #include <Library/PrintLib.h>
  18 #include <Library/BaseMemoryLib.h>
  19 #include <Library/SerialPortLib.h>
  20 #include <Library/ArmPlatformLib.h>
  21 #include <Library/ArmGicLib.h>
  22 #include <Library/ArmCpuLib.h>
  23
  24 #include "SecInternal.h"
  25
  26 #define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
  27
  28 extern VOID *monitor_vector_table;
  29
  30 VOID
  31 CEntryPoint (
  32   IN  UINTN                     MpId
  33   )
  34 {
  35   CHAR8           Buffer[100];
  36   UINTN           CharCount;
  37   UINTN           JumpAddress;
  38
  39   // Primary CPU clears out the SCU tag RAMs, secondaries wait
  40   if (IS_PRIMARY_CORE(MpId)) {
  41     ArmCpuSetup (MpId);
  42
  43     if (ArmIsMpCore()) {
  44       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
  45     }
  46
  47     // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
  48     // In non SEC modules the init call is in autogenerated code.
  49     SerialPortInitialize ();
  50
  51     // Start talking
  52     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
  53     SerialPortWrite ((UINT8 *) Buffer, CharCount);
  54
  55     // Initialize the Debug Agent for Source Level Debugging
  56     InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
  57     SaveAndSetDebugTimerInterrupt (TRUE);
  58
  59     // Now we've got UART, make the check:
  60     // - The Vector table must be 32-byte aligned
  61     ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
  62
  63     // Enable the GIC distributor and CPU Interface
  64     // - no other Interrupts are enabled,  doesn't have to worry about the priority.
  65     // - all the cores are in secure state, use secure SGI's
  66     ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
  67     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  68   } else {
  69     // Enable the GIC CPU Interface
  70     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  71   }
  72
  73   // Invalidate the data cache. Doesn't have to do the Data cache clean.
  74   ArmInvalidateDataCache();
  75
  76   // Invalidate Instruction Cache
  77   ArmInvalidateInstructionCache();
  78
  79   // Invalidate I & D TLBs
  80   ArmInvalidateInstructionAndDataTlb();
  81
  82   // Enable Full Access to CoProcessors
  83   ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
  84
  85   if (FixedPcdGet32 (PcdVFPEnabled)) {
  86     ArmEnableVFP();
  87   }
  88
  89   if (IS_PRIMARY_CORE(MpId)) {
  90     // Initialize peripherals that must be done at the early stage
  91     // Example: Some L2x0 controllers must be initialized in Secure World
  92     ArmPlatformSecInitialize ();
  93
  94     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
  95     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
  96     if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  97       // Initialize system memory (DRAM)
  98       ArmPlatformInitializeSystemMemory ();
  99     }
 100
 101     // Some platform can change their physical memory mapping
 102     ArmPlatformBootRemapping ();
 103   }
 104
 105   // Test if Trustzone is supported on this platform
 106   if (FixedPcdGetBool (PcdTrustzoneSupport)) {
 107     // Ensure the Monitor Stack Base & Size have been set
 108     ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
 109     ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
 110
 111     if (ArmIsMpCore()) {
 112       // Setup SMP in Non Secure world
 113       ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
 114     }
 115
 116     // Enter Monitor Mode
 117     enter_monitor_mode ((VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * GET_CORE_POS(MpId))));
 118
 119     //Write the monitor mode vector table address
 120     ArmWriteVMBar((UINT32) &monitor_vector_table);
 121
 122     //-------------------- Monitor Mode ---------------------
 123     // Setup the Trustzone Chipsets
 124     if (IS_PRIMARY_CORE(MpId)) {
 125       ArmPlatformTrustzoneInit ();
 126
 127       // Waiting for the Primary Core to have finished to initialize the Secure World
 128       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
 129     } else {
 130       // The secondary cores need to wait until the Trustzone chipsets configuration is done
 131       // before switching to Non Secure World
 132
 133       // Waiting for the Primary Core to have finished to initialize the Secure World
 134       ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
 135     }
 136
 137     // Transfer the interrupt to Non-secure World
 138     ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
 139
 140     // Write to CP15 Non-secure Access Control Register :
 141     //   - Enable CP10 and CP11 accesses in NS World
 142     //   - Enable Access to Preload Engine in NS World
 143     //   - Enable lockable TLB entries allocation in NS world
 144     //   - Enable R/W access to SMP bit of Auxiliary Control Register in NS world
 145     ArmWriteNsacr (NSACR_NS_SMP | NSACR_TL | NSACR_PLE | NSACR_CP(10) | NSACR_CP(11));
 146
 147     // CP15 Secure Configuration Register with Non Secure bit (SCR_NS), CPSR.A modified in any
 148     // security state (SCR_AW), CPSR.F modified in any security state (SCR_FW)
 149     ArmWriteScr (SCR_NS | SCR_FW | SCR_AW);
 150   } else {
 151     if (IS_PRIMARY_CORE(MpId)) {
 152       SerialPrint ("Trust Zone Configuration is disabled\n\r");
 153     }
 154
 155     // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
 156     // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
 157     // Status Register as the the current one (CPSR).
 158     copy_cpsr_into_spsr ();
 159   }
 160
 161   JumpAddress = PcdGet32 (PcdFvBaseAddress);
 162   ArmPlatformSecExtraAction (MpId, &JumpAddress);
 163
 164   return_from_exception (JumpAddress);
 165   //-------------------- Non Secure Mode ---------------------
 166
 167   // PEI Core should always load and never return
 168   ASSERT (FALSE);
 169 }
 170
 171 VOID
 172 SecCommonExceptionEntry (
 173   IN UINT32 Entry,
 174   IN UINT32 LR
 175   )
 176 {
 177   CHAR8           Buffer[100];
 178   UINTN           CharCount;
 179
 180   switch (Entry) {
 181   case 0:
 182     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
 183     break;
 184   case 1:
 185     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
 186     break;
 187   case 2:
 188     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
 189     break;
 190   case 3:
 191     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
 192     break;
 193   case 4:
 194     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
 195     break;
 196   case 5:
 197     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
 198     break;
 199   case 6:
 200     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
 201     break;
 202   case 7:
 203     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
 204     break;
 205   default:
 206     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
 207     break;
 208   }
 209   SerialPortWrite ((UINT8 *) Buffer, CharCount);
 210   while(1);
 211 }