2 * Main file supporting the SEC Phase on ARM Platforms
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include <Library/DebugAgentLib.h>
17 #include <Library/PrintLib.h>
18 #include <Library/BaseMemoryLib.h>
19 #include <Library/SerialPortLib.h>
20 #include <Library/ArmGicLib.h>
21 #include <Library/ArmCpuLib.h>
23 #include "SecInternal.h"
25 #define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
27 extern VOID
*monitor_vector_table
;
38 // Primary CPU clears out the SCU tag RAMs, secondaries wait
39 if (IS_PRIMARY_CORE(MpId
)) {
43 ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT
);
46 // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
47 // In non SEC modules the init call is in autogenerated code.
48 SerialPortInitialize ();
51 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"UEFI firmware built at %a on %a\n\r",__TIME__
, __DATE__
);
52 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);
54 // Initialize the Debug Agent for Source Level Debugging
55 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC
, NULL
, NULL
);
56 SaveAndSetDebugTimerInterrupt (TRUE
);
58 // Now we've got UART, make the check:
59 // - The Vector table must be 32-byte aligned
60 ASSERT(((UINT32
)SecVectorTable
& ((1 << 5)-1)) == 0);
62 // Enable the GIC distributor and CPU Interface
63 // - no other Interrupts are enabled, doesn't have to worry about the priority.
64 // - all the cores are in secure state, use secure SGI's
65 ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase
));
66 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase
));
68 // Enable the GIC CPU Interface
69 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase
));
72 // Invalidate the data cache. Doesn't have to do the Data cache clean.
73 ArmInvalidateDataCache();
75 // Invalidate Instruction Cache
76 ArmInvalidateInstructionCache();
78 // Invalidate I & D TLBs
79 ArmInvalidateInstructionAndDataTlb();
81 // Enable Full Access to CoProcessors
82 ArmWriteCPACR (CPACR_CP_FULL_ACCESS
);
84 if (FixedPcdGet32 (PcdVFPEnabled
)) {
88 if (IS_PRIMARY_CORE(MpId
)) {
89 // Initialize peripherals that must be done at the early stage
90 // Example: Some L2x0 controllers must be initialized in Secure World
91 ArmPlatformSecInitialize ();
93 // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
94 // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
95 if (FeaturePcdGet (PcdSystemMemoryInitializeInSec
)) {
96 // Initialize system memory (DRAM)
97 ArmPlatformInitializeSystemMemory ();
101 // Test if Trustzone is supported on this platform
102 if (FixedPcdGetBool (PcdTrustzoneSupport
)) {
103 // Ensure the Monitor Stack Base & Size have been set
104 ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase
) != 0);
105 ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize
) != 0);
108 // Setup SMP in Non Secure world
109 ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId
));
112 // Enter Monitor Mode
113 enter_monitor_mode ((VOID
*)(PcdGet32(PcdCPUCoresSecMonStackBase
) + (PcdGet32(PcdCPUCoreSecMonStackSize
) * GET_CORE_POS(MpId
))));
115 //Write the monitor mode vector table address
116 ArmWriteVMBar((UINT32
) &monitor_vector_table
);
118 //-------------------- Monitor Mode ---------------------
119 // Setup the Trustzone Chipsets
120 if (IS_PRIMARY_CORE(MpId
)) {
121 ArmPlatformTrustzoneInit ();
123 // Waiting for the Primary Core to have finished to initialize the Secure World
124 ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT
);
126 // The secondary cores need to wait until the Trustzone chipsets configuration is done
127 // before switching to Non Secure World
129 // Waiting for the Primary Core to have finished to initialize the Secure World
130 ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT
);
133 // Transfer the interrupt to Non-secure World
134 ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase
), PcdGet32(PcdGicInterruptInterfaceBase
));
136 // Write to CP15 Non-secure Access Control Register :
137 // - Enable CP10 and CP11 accesses in NS World
138 // - Enable Access to Preload Engine in NS World
139 // - Enable lockable TLB entries allocation in NS world
140 // - Enable R/W access to SMP bit of Auxiliary Control Register in NS world
141 ArmWriteNsacr (NSACR_NS_SMP
| NSACR_TL
| NSACR_PLE
| NSACR_CP(10) | NSACR_CP(11));
143 // CP15 Secure Configuration Register with Non Secure bit (SCR_NS), CPSR.A modified in any
144 // security state (SCR_AW), CPSR.F modified in any security state (SCR_FW)
145 ArmWriteScr (SCR_NS
| SCR_FW
| SCR_AW
);
147 if (IS_PRIMARY_CORE(MpId
)) {
148 SerialPrint ("Trust Zone Configuration is disabled\n\r");
151 // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
152 // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
153 // Status Register as the the current one (CPSR).
154 copy_cpsr_into_spsr ();
157 JumpAddress
= PcdGet32 (PcdFvBaseAddress
);
158 ArmPlatformSecExtraAction (MpId
, &JumpAddress
);
160 return_from_exception (JumpAddress
);
161 //-------------------- Non Secure Mode ---------------------
163 // PEI Core should always load and never return
168 SecCommonExceptionEntry (
178 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Reset Exception at 0x%X\n\r",LR
);
181 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Undefined Exception at 0x%X\n\r",LR
);
184 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"SWI Exception at 0x%X\n\r",LR
);
187 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"PrefetchAbort Exception at 0x%X\n\r",LR
);
190 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"DataAbort Exception at 0x%X\n\r",LR
);
193 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Reserved Exception at 0x%X\n\r",LR
);
196 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"IRQ Exception at 0x%X\n\r",LR
);
199 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"FIQ Exception at 0x%X\n\r",LR
);
202 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Unknown Exception at 0x%X\n\r",LR
);
205 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);