ArmRealViewEbPkg/Sec/Arm/ModuleEntryPoint.asm

   1 //------------------------------------------------------------------------------
   2 //
   3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 //
   5 // This program and the accompanying materials
   6 // are licensed and made available under the terms and conditions of the BSD License
   7 // which accompanies this distribution.  The full text of the license may be found at
   8 // http://opensource.org/licenses/bsd-license.php
   9 //
  10 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 //
  13 //------------------------------------------------------------------------------
  14
  15 #include <AsmMacroIoLib.h>
  16 #include <Base.h>
  17 #include <Library/PcdLib.h>
  18 #include <ArmEb/ArmEb.h>
  19 #include <AutoGen.h>
  20
  21   INCLUDE AsmMacroIoLib.inc
  22
  23   IMPORT  CEntryPoint
  24   EXPORT  _ModuleEntryPoint
  25
  26   PRESERVE8
  27   AREA    ModuleEntryPoint, CODE, READONLY
  28
  29
  30 StartupAddr        DCD      CEntryPoint
  31
  32 _ModuleEntryPoint
  33
  34   // Turn off remapping NOR to 0. We can now use DRAM in low memory
  35   // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
  36   //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
  37
  38   // Enable NEON register in case folks want to use them for optimizations (CopyMem)
  39   mrc     p15, 0, r0, c1, c0, 2
  40   orr     r0, r0, #0x00f00000   // Enable VFP access (V* instructions)
  41   mcr     p15, 0, r0, c1, c0, 2
  42   mov     r0, #0x40000000       // Set EN bit in FPEXC
  43   mcr     p10,#0x7,r0,c8,c0,#0  // msr     FPEXC,r0 in ARM assembly
  44
  45   // Set CPU vectors to 0 (which is currently flash)
  46   LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
  47   mcr     p15, 0, r0, c12, c0, 0
  48   isb                               // Sync changes to control registers
  49
  50   //
  51   // Set stack based on PCD values. Need to do it this way to make C code work
  52   // when it runs from FLASH.
  53   //
  54   LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2)    // stack base arg2
  55   LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3)    // stack size arg3
  56   add     r4, r2, r3
  57   mov     r13, r4
  58
  59   LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1)    // memory size arg1
  60   LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0)    // memory size arg0
  61
  62   // move sec startup address into a data register
  63   // ensure we're jumping to FV version of the code (not boot remapped alias)
  64   ldr   r4, StartupAddr
  65
  66   // jump to SEC C code
  67   blx   r4
  68
  69   // Call C entry point
  70   // THIS DOESN'T WORK, WE NEED A LONG JUMP
  71
  72   // blx     CEntryPoint
  73
  74 ShouldNeverGetHere
  75   // _CEntryPoint should never return
  76   b       ShouldNeverGetHere
  77
  78   END
  79
  80