ArmRealViewEbPkg/SecForPei/Arm/ModuleEntryPoint.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # ARM EB Entry point. Reset vector in FV header will brach to
   4 # _ModuleEntryPoint.
   5 #
   6 # We use crazy macros, like LoadConstantToReg, since Xcode assembler
   7 # does not support = assembly syntax for ldr.
   8 #
   9 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
  10 #
  11 # This program and the accompanying materials
  12 # are licensed and made available under the terms and conditions of the BSD License
  13 # which accompanies this distribution.  The full text of the license may be found at
  14 # http://opensource.org/licenses/bsd-license.php
  15 #
  16 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  17 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  18 #
  19 #------------------------------------------------------------------------------
  20
  21 #include <AsmMacroIoLib.h>
  22 #include <Base.h>
  23 #include <Library/PcdLib.h>
  24 #include <ArmEb/ArmEb.h>
  25
  26 .text
  27 .align 3
  28
  29 .globl ASM_PFX(CEntryPoint)
  30 .globl ASM_PFX(_ModuleEntryPoint)
  31 .globl ASM_PFX(StartupAddr)
  32
  33 ASM_PFX(_ModuleEntryPoint):
  34
  35   // Turn off remapping NOR to 0. We can now use DRAM in low memory
  36   // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR
  37   //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
  38
  39   // Enable NEON register in case folks want to use them for optimizations (CopyMem)
  40   mrc     p15, 0, r0, c1, c0, 2
  41   orr     r0, r0, #0x00f00000   // Enable VFP access (V* instructions)
  42   mcr     p15, 0, r0, c1, c0, 2
  43   mov     r0, #0x40000000       // Set EN bit in FPEXC
  44   mcr     p10,#0x7,r0,c8,c0,#0  // msr     FPEXC,r0 in ARM assembly
  45
  46   // Set CPU vectors to 0 (which is currently flash)
  47   LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
  48   mcr     p15, 0, r0, c12, c0, 0
  49   isb                               // Sync changes to control registers
  50
  51   //
  52   // Set stack based on PCD values. Need to do it this way to make C code work
  53   // when it runs from FLASH.
  54   //
  55   LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0)    // temp ram base  arg 0 TODO: change "stackbase" to "temprambase"
  56   LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1)    // temp ram size  arg 1
  57   lsr     r3, r1, #1   // r4 = size of temp mem / 2
  58   add     r3, r3, r0  // r2 = temp ram base + r4
  59   mov     r13, r3     // result: stack pointer = temp ram base + (size of temp mem / 2)
  60
  61   // lr points to area in reset vector block containing PEI core address
  62   ldr     r2, [lr]  // pei core   arg 3
  63
  64   // move sec startup address into a data register
  65   // ensure we're jumping to FV version of the code (not boot remapped alias)
  66 #ifndef __APPLE__
  67 // This does not generate a valid relocation for Xcode. Fix me...
  68   ldr   r4, ASM_PFX(StartupAddr)
  69
  70   // jump to SEC C code
  71   blx   r4
  72 #endif
  73
  74
  75 ASM_PFX(ShouldNeverGetHere):
  76   // _CEntryPoint should never return
  77   b       ASM_PFX(ShouldNeverGetHere)
  78
  79