ArmVirtPkg/PciHostBridgeDxe/PciHostBridge.h

   1 /** @file
   2   The Header file of the Pci Host Bridge Driver
   3
   4   Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials are
   6   licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _PCI_HOST_BRIDGE_H_
  16 #define _PCI_HOST_BRIDGE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <IndustryStandard/Pci.h>
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciRootBridgeIo.h>
  25 #include <Protocol/Metronome.h>
  26 #include <Protocol/DevicePath.h>
  27 #include <Protocol/FdtClient.h>
  28
  29
  30 #include <Library/BaseLib.h>
  31 #include <Library/DebugLib.h>
  32 #include <Library/BaseMemoryLib.h>
  33 #include <Library/MemoryAllocationLib.h>
  34 #include <Library/UefiLib.h>
  35 #include <Library/UefiBootServicesTableLib.h>
  36 #include <Library/DxeServicesTableLib.h>
  37 #include <Library/DevicePathLib.h>
  38 #include <Library/IoLib.h>
  39 #include <Library/PciLib.h>
  40 #include <Library/PcdLib.h>
  41
  42 //
  43 // Hard code the host bridge number in the platform.
  44 // In this chipset, there is only one host bridge.
  45 //
  46 #define HOST_BRIDGE_NUMBER  1
  47
  48 #define MAX_PCI_DEVICE_NUMBER      31
  49 #define MAX_PCI_FUNCTION_NUMBER    7
  50 #define MAX_PCI_REG_ADDRESS        (SIZE_4KB - 1)
  51
  52 typedef enum {
  53   IoOperation,
  54   MemOperation,
  55   PciOperation
  56 } OPERATION_TYPE;
  57
  58 #define PCI_HOST_BRIDGE_SIGNATURE  SIGNATURE_32('e', 'h', 's', 't')
  59 typedef struct {
  60   UINTN                                             Signature;
  61   EFI_HANDLE                                        HostBridgeHandle;
  62   UINTN                                             RootBridgeNumber;
  63   LIST_ENTRY                                        Head;
  64   BOOLEAN                                           ResourceSubmited;
  65   BOOLEAN                                           CanRestarted;
  66   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
  67 } PCI_HOST_BRIDGE_INSTANCE;
  68
  69 #define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
  70   CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
  71
  72 //
  73 //  HostBridge Resource Allocation interface
  74 //
  75
  76 /**
  77    These are the notifications from the PCI bus driver that it is about to enter a certain
  78    phase of the PCI enumeration process.
  79
  80    This member function can be used to notify the host bridge driver to perform specific actions,
  81    including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
  82    Eight notification points are defined at this time. See belows:
  83    EfiPciHostBridgeBeginEnumeration       Resets the host bridge PCI apertures and internal data
  84                                           structures. The PCI enumerator should issue this notification
  85                                           before starting a fresh enumeration process. Enumeration cannot
  86                                           be restarted after sending any other notification such as
  87                                           EfiPciHostBridgeBeginBusAllocation.
  88    EfiPciHostBridgeBeginBusAllocation     The bus allocation phase is about to begin. No specific action is
  89                                           required here. This notification can be used to perform any
  90                                           chipset-specific programming.
  91    EfiPciHostBridgeEndBusAllocation       The bus allocation and bus programming phase is complete. No
  92                                           specific action is required here. This notification can be used to
  93                                           perform any chipset-specific programming.
  94    EfiPciHostBridgeBeginResourceAllocation
  95                                           The resource allocation phase is about to begin. No specific
  96                                           action is required here. This notification can be used to perform
  97                                           any chipset-specific programming.
  98    EfiPciHostBridgeAllocateResources      Allocates resources per previously submitted requests for all the PCI
  99                                           root bridges. These resource settings are returned on the next call to
 100                                           GetProposedResources(). Before calling NotifyPhase() with a Phase of
 101                                           EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
 102                                           for gathering I/O and memory requests for
 103                                           all the PCI root bridges and submitting these requests using
 104                                           SubmitResources(). This function pads the resource amount
 105                                           to suit the root bridge hardware, takes care of dependencies between
 106                                           the PCI root bridges, and calls the Global Coherency Domain (GCD)
 107                                           with the allocation request. In the case of padding, the allocated range
 108                                           could be bigger than what was requested.
 109    EfiPciHostBridgeSetResources           Programs the host bridge hardware to decode previously allocated
 110                                           resources (proposed resources) for all the PCI root bridges. After the
 111                                           hardware is programmed, reassigning resources will not be supported.
 112                                           The bus settings are not affected.
 113    EfiPciHostBridgeFreeResources          Deallocates resources that were previously allocated for all the PCI
 114                                           root bridges and resets the I/O and memory apertures to their initial
 115                                           state. The bus settings are not affected. If the request to allocate
 116                                           resources fails, the PCI enumerator can use this notification to
 117                                           deallocate previous resources, adjust the requests, and retry
 118                                           allocation.
 119    EfiPciHostBridgeEndResourceAllocation  The resource allocation phase is completed. No specific action is
 120                                           required here. This notification can be used to perform any chipsetspecific
 121                                           programming.
 122
 123    @param[in] This                The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 124    @param[in] Phase               The phase during enumeration
 125
 126    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error
 127                                   is valid for a Phase of EfiPciHostBridgeAllocateResources if
 128                                   SubmitResources() has not been called for one or more
 129                                   PCI root bridges before this call
 130    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error. This error is valid
 131                                   for a Phase of EfiPciHostBridgeSetResources.
 132    @retval EFI_INVALID_PARAMETER  Invalid phase parameter
 133    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 134                                   This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
 135                                   previously submitted resource requests cannot be fulfilled or
 136                                   were only partially fulfilled.
 137    @retval EFI_SUCCESS            The notification was accepted without any errors.
 138
 139 **/
 140 EFI_STATUS
 141 EFIAPI
 142 NotifyPhase(
 143   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 144   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
 145   );
 146
 147 /**
 148    Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
 149
 150    This function is called multiple times to retrieve the device handles of all the PCI root bridges that
 151    are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
 152    root bridges. On each call, the handle that was returned by the previous call is passed into the
 153    interface, and on output the interface returns the device handle of the next PCI root bridge. The
 154    caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
 155    for that root bridge. When there are no more PCI root bridges to report, the interface returns
 156    EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
 157    are returned by this function.
 158    For D945 implementation, there is only one root bridge in PCI host bridge.
 159
 160    @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 161    @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.
 162
 163    @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
 164                                   specific Host bridge and return EFI_SUCCESS.
 165    @retval EFI_NOT_FOUND          Can not find the any more root bridge in specific host bridge.
 166    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
 167                                   returned on a previous call to GetNextRootBridge().
 168 **/
 169 EFI_STATUS
 170 EFIAPI
 171 GetNextRootBridge(
 172   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 173   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
 174   );
 175
 176 /**
 177    Returns the allocation attributes of a PCI root bridge.
 178
 179    The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
 180    from one PCI root bridge to another. These attributes are different from the decode-related
 181    attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
 182    RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
 183    handles of all the root bridges that are associated with this host bridge must be obtained by calling
 184    GetNextRootBridge(). The attributes are static in the sense that they do not change during or
 185    after the enumeration process. The hardware may provide mechanisms to change the attributes on
 186    the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
 187    installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
 188    "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
 189    For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
 190    include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
 191    prefetchable memory.
 192       Attribute                                 Description
 193    ------------------------------------         ----------------------------------------------------------------------
 194    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM         If this bit is set, then the PCI root bridge does not support separate
 195                                                 windows for nonprefetchable and prefetchable memory. A PCI bus
 196                                                 driver needs to include requests for prefetchable memory in the
 197                                                 nonprefetchable memory pool.
 198
 199    EFI_PCI_HOST_BRIDGE_MEM64_DECODE             If this bit is set, then the PCI root bridge supports 64-bit memory
 200                                                 windows. If this bit is not set, the PCI bus driver needs to include
 201                                                 requests for a 64-bit memory address in the corresponding 32-bit
 202                                                 memory pool.
 203
 204    @param[in]   This               The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 205    @param[in]   RootBridgeHandle   The device handle of the PCI root bridge in which the caller is interested. Type
 206                                    EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 207    @param[out]  Attributes         The pointer to attribte of root bridge, it is output parameter
 208
 209    @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
 210    @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
 211    @retval EFI_SUCCESS             Success to get attribute of interested root bridge.
 212
 213 **/
 214 EFI_STATUS
 215 EFIAPI
 216 GetAttributes(
 217   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 218   IN  EFI_HANDLE                                       RootBridgeHandle,
 219   OUT UINT64                                           *Attributes
 220   );
 221
 222 /**
 223    Sets up the specified PCI root bridge for the bus enumeration process.
 224
 225    This member function sets up the root bridge for bus enumeration and returns the PCI bus range
 226    over which the search should be performed in ACPI 2.0 resource descriptor format.
 227
 228    @param[in]   This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
 229    @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
 230    @param[out]  Configuration     Pointer to the pointer to the PCI bus resource descriptor.
 231
 232    @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
 233    @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
 234    @retval EFI_SUCCESS           Sucess to allocate ACPI resource descriptor.
 235
 236 **/
 237 EFI_STATUS
 238 EFIAPI
 239 StartBusEnumeration(
 240   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 241   IN  EFI_HANDLE                                       RootBridgeHandle,
 242   OUT VOID                                             **Configuration
 243   );
 244
 245 /**
 246    Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
 247
 248    This member function programs the specified PCI root bridge to decode the bus range that is
 249    specified by the input parameter Configuration.
 250    The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
 251
 252    @param[in] This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
 253    @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be programmed
 254    @param[in] Configuration     The pointer to the PCI bus resource descriptor
 255
 256    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 257    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 258    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 259    @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI 2.0 bus resource descriptor.
 260    @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than
 261                                   bus descriptors.
 262    @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid ACPI resource descriptors.
 263    @retval EFI_INVALID_PARAMETER  "Address Range Minimum" is invalid for this root bridge.
 264    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this root bridge.
 265    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 266    @retval EFI_SUCCESS            The bus range for the PCI root bridge was programmed.
 267
 268 **/
 269 EFI_STATUS
 270 EFIAPI
 271 SetBusNumbers(
 272   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 273   IN EFI_HANDLE                                       RootBridgeHandle,
 274   IN VOID                                             *Configuration
 275   );
 276
 277 /**
 278    Submits the I/O and memory resource requirements for the specified PCI root bridge.
 279
 280    This function is used to submit all the I/O and memory resources that are required by the specified
 281    PCI root bridge. The input parameter Configuration is used to specify the following:
 282    - The various types of resources that are required
 283    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 284
 285    @param[in] This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 286    @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory resource requirements are being submitted.
 287    @param[in] Configuration     The pointer to the PCI I/O and PCI memory resource descriptor.
 288
 289    @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI root bridge were accepted.
 290    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 291    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 292    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 293    @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are
 294                                   not supported by this PCI root bridge. This error will happen if the caller
 295                                   did not combine resources according to Attributes that were returned by
 296                                   GetAllocAttributes().
 297    @retval EFI_INVALID_PARAMETER  Address Range Maximum" is invalid.
 298    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this PCI root bridge.
 299    @retval EFI_INVALID_PARAMETER  "Address Space Granularity" is invalid for this PCI root bridge.
 300
 301 **/
 302 EFI_STATUS
 303 EFIAPI
 304 SubmitResources(
 305   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 306   IN EFI_HANDLE                                       RootBridgeHandle,
 307   IN VOID                                             *Configuration
 308   );
 309
 310 /**
 311    Returns the proposed resource settings for the specified PCI root bridge.
 312
 313    This member function returns the proposed resource settings for the specified PCI root bridge. The
 314    proposed resource settings are prepared when NotifyPhase() is called with a Phase of
 315    EfiPciHostBridgeAllocateResources. The output parameter Configuration
 316    specifies the following:
 317    - The various types of resources, excluding bus resources, that are allocated
 318    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 319
 320    @param[in]  This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 321    @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 322    @param[out] Configuration     The pointer to the pointer to the PCI I/O and memory resource descriptor.
 323
 324    @retval EFI_SUCCESS            The requested parameters were returned.
 325    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 326    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 327    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 328
 329 **/
 330 EFI_STATUS
 331 EFIAPI
 332 GetProposedResources(
 333   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 334   IN  EFI_HANDLE                                       RootBridgeHandle,
 335   OUT VOID                                             **Configuration
 336   );
 337
 338 /**
 339    Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
 340    stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
 341    PCI controllers before enumeration.
 342
 343    This function is called during the PCI enumeration process. No specific action is expected from this
 344    member function. It allows the host bridge driver to preinitialize individual PCI controllers before
 345    enumeration.
 346
 347    @param This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 348    @param RootBridgeHandle  The associated PCI root bridge handle. Type EFI_HANDLE is defined in
 349                             InstallProtocolInterface() in the UEFI 2.0 Specification.
 350    @param PciAddress        The address of the PCI device on the PCI bus. This address can be passed to the
 351                             EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
 352                             configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
 353                             the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
 354    @param Phase             The phase of the PCI device enumeration.
 355
 356    @retval EFI_SUCCESS              The requested parameters were returned.
 357    @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
 358    @retval EFI_INVALID_PARAMETER    Phase is not a valid phase that is defined in
 359                                     EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
 360    @retval EFI_DEVICE_ERROR         Programming failed due to a hardware error. The PCI enumerator should
 361                                     not enumerate this device, including its child devices if it is a PCI-to-PCI
 362                                     bridge.
 363
 364 **/
 365 EFI_STATUS
 366 EFIAPI
 367 PreprocessController (
 368   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,
 369   IN  EFI_HANDLE                                        RootBridgeHandle,
 370   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,
 371   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase
 372   );
 373
 374
 375 //
 376 // Define resource status constant
 377 //
 378 #define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
 379 #define EFI_RESOURCE_LESS          0xFFFFFFFFFFFFFFFEULL
 380
 381
 382 //
 383 // Driver Instance Data Prototypes
 384 //
 385
 386 typedef struct {
 387   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 388   UINTN                                      NumberOfBytes;
 389   UINTN                                      NumberOfPages;
 390   EFI_PHYSICAL_ADDRESS                       HostAddress;
 391   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 392 } MAP_INFO;
 393
 394 typedef struct {
 395   ACPI_HID_DEVICE_PATH              AcpiDevicePath;
 396   EFI_DEVICE_PATH_PROTOCOL          EndDevicePath;
 397 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
 398
 399 typedef struct {
 400   UINT64          BusBase;
 401   UINT64          BusLimit;
 402
 403   UINT64          MemBase;
 404   UINT64          MemLimit;
 405
 406   UINT64          IoBase;
 407   UINT64          IoLimit;
 408   UINT64          IoTranslation;
 409 } PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
 410
 411 typedef enum {
 412   TypeIo = 0,
 413   TypeMem32,
 414   TypePMem32,
 415   TypeMem64,
 416   TypePMem64,
 417   TypeBus,
 418   TypeMax
 419 } PCI_RESOURCE_TYPE;
 420
 421 typedef enum {
 422   ResNone = 0,
 423   ResSubmitted,
 424   ResRequested,
 425   ResAllocated,
 426   ResStatusMax
 427 } RES_STATUS;
 428
 429 typedef struct {
 430   PCI_RESOURCE_TYPE Type;
 431   UINT64            Base;
 432   UINT64            Length;
 433   UINT64            Alignment;
 434   RES_STATUS        Status;
 435 } PCI_RES_NODE;
 436
 437 #define PCI_ROOT_BRIDGE_SIGNATURE  SIGNATURE_32('e', '2', 'p', 'b')
 438
 439 typedef struct {
 440   UINT32                 Signature;
 441   LIST_ENTRY             Link;
 442   EFI_HANDLE             Handle;
 443   UINT64                 RootBridgeAttrib;
 444   UINT64                 Attributes;
 445   UINT64                 Supports;
 446
 447   //
 448   // Specific for this memory controller: Bus, I/O, Mem
 449   //
 450   PCI_RES_NODE           ResAllocNode[6];
 451
 452   //
 453   // Addressing for Memory and I/O and Bus arrange
 454   //
 455   UINT64                 BusBase;
 456   UINT64                 MemBase;
 457   UINT64                 IoBase;
 458   UINT64                 BusLimit;
 459   UINT64                 MemLimit;
 460   UINT64                 IoLimit;
 461   UINT64                 IoTranslation;
 462
 463   EFI_DEVICE_PATH_PROTOCOL                *DevicePath;
 464   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
 465
 466 } PCI_ROOT_BRIDGE_INSTANCE;
 467
 468
 469 //
 470 // Driver Instance Data Macros
 471 //
 472 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
 473   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
 474
 475
 476 #define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
 477   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
 478
 479 /**
 480
 481   Construct the Pci Root Bridge Io protocol
 482
 483   @param Protocol         Point to protocol instance
 484   @param HostBridgeHandle Handle of host bridge
 485   @param Attri            Attribute of host bridge
 486   @param ResAperture      ResourceAperture for host bridge
 487
 488   @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.
 489
 490 **/
 491 EFI_STATUS
 492 RootBridgeConstructor (
 493   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,
 494   IN EFI_HANDLE                         HostBridgeHandle,
 495   IN UINT64                             Attri,
 496   IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE  *ResAperture
 497   );
 498
 499 #endif