ArmVirtPkg/PciHostBridgeDxe/PciHostBridge.h

   1 /** @file
   2   The Header file of the Pci Host Bridge Driver
   3
   4   Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials are
   6   licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _PCI_HOST_BRIDGE_H_
  16 #define _PCI_HOST_BRIDGE_H_
  17
  18 #include <PiDxe.h>
  19
  20 #include <IndustryStandard/Pci.h>
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciRootBridgeIo.h>
  25 #include <Protocol/Metronome.h>
  26 #include <Protocol/DevicePath.h>
  27
  28
  29 #include <Library/BaseLib.h>
  30 #include <Library/DebugLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/UefiLib.h>
  34 #include <Library/UefiBootServicesTableLib.h>
  35 #include <Library/DxeServicesTableLib.h>
  36 #include <Library/DevicePathLib.h>
  37 #include <Library/IoLib.h>
  38 #include <Library/PciLib.h>
  39 #include <Library/PcdLib.h>
  40
  41 //
  42 // Hard code the host bridge number in the platform.
  43 // In this chipset, there is only one host bridge.
  44 //
  45 #define HOST_BRIDGE_NUMBER  1
  46
  47 #define MAX_PCI_DEVICE_NUMBER      31
  48 #define MAX_PCI_FUNCTION_NUMBER    7
  49 #define MAX_PCI_REG_ADDRESS        (SIZE_4KB - 1)
  50
  51 typedef enum {
  52   IoOperation,
  53   MemOperation,
  54   PciOperation
  55 } OPERATION_TYPE;
  56
  57 #define PCI_HOST_BRIDGE_SIGNATURE  SIGNATURE_32('e', 'h', 's', 't')
  58 typedef struct {
  59   UINTN                                             Signature;
  60   EFI_HANDLE                                        HostBridgeHandle;
  61   UINTN                                             RootBridgeNumber;
  62   LIST_ENTRY                                        Head;
  63   BOOLEAN                                           ResourceSubmited;
  64   BOOLEAN                                           CanRestarted;
  65   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;
  66 } PCI_HOST_BRIDGE_INSTANCE;
  67
  68 #define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
  69   CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
  70
  71 //
  72 //  HostBridge Resource Allocation interface
  73 //
  74
  75 /**
  76    These are the notifications from the PCI bus driver that it is about to enter a certain
  77    phase of the PCI enumeration process.
  78
  79    This member function can be used to notify the host bridge driver to perform specific actions,
  80    including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
  81    Eight notification points are defined at this time. See belows:
  82    EfiPciHostBridgeBeginEnumeration       Resets the host bridge PCI apertures and internal data
  83                                           structures. The PCI enumerator should issue this notification
  84                                           before starting a fresh enumeration process. Enumeration cannot
  85                                           be restarted after sending any other notification such as
  86                                           EfiPciHostBridgeBeginBusAllocation.
  87    EfiPciHostBridgeBeginBusAllocation     The bus allocation phase is about to begin. No specific action is
  88                                           required here. This notification can be used to perform any
  89                                           chipset-specific programming.
  90    EfiPciHostBridgeEndBusAllocation       The bus allocation and bus programming phase is complete. No
  91                                           specific action is required here. This notification can be used to
  92                                           perform any chipset-specific programming.
  93    EfiPciHostBridgeBeginResourceAllocation
  94                                           The resource allocation phase is about to begin. No specific
  95                                           action is required here. This notification can be used to perform
  96                                           any chipset-specific programming.
  97    EfiPciHostBridgeAllocateResources      Allocates resources per previously submitted requests for all the PCI
  98                                           root bridges. These resource settings are returned on the next call to
  99                                           GetProposedResources(). Before calling NotifyPhase() with a Phase of
 100                                           EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
 101                                           for gathering I/O and memory requests for
 102                                           all the PCI root bridges and submitting these requests using
 103                                           SubmitResources(). This function pads the resource amount
 104                                           to suit the root bridge hardware, takes care of dependencies between
 105                                           the PCI root bridges, and calls the Global Coherency Domain (GCD)
 106                                           with the allocation request. In the case of padding, the allocated range
 107                                           could be bigger than what was requested.
 108    EfiPciHostBridgeSetResources           Programs the host bridge hardware to decode previously allocated
 109                                           resources (proposed resources) for all the PCI root bridges. After the
 110                                           hardware is programmed, reassigning resources will not be supported.
 111                                           The bus settings are not affected.
 112    EfiPciHostBridgeFreeResources          Deallocates resources that were previously allocated for all the PCI
 113                                           root bridges and resets the I/O and memory apertures to their initial
 114                                           state. The bus settings are not affected. If the request to allocate
 115                                           resources fails, the PCI enumerator can use this notification to
 116                                           deallocate previous resources, adjust the requests, and retry
 117                                           allocation.
 118    EfiPciHostBridgeEndResourceAllocation  The resource allocation phase is completed. No specific action is
 119                                           required here. This notification can be used to perform any chipsetspecific
 120                                           programming.
 121
 122    @param[in] This                The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 123    @param[in] Phase               The phase during enumeration
 124
 125    @retval EFI_NOT_READY          This phase cannot be entered at this time. For example, this error
 126                                   is valid for a Phase of EfiPciHostBridgeAllocateResources if
 127                                   SubmitResources() has not been called for one or more
 128                                   PCI root bridges before this call
 129    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error. This error is valid
 130                                   for a Phase of EfiPciHostBridgeSetResources.
 131    @retval EFI_INVALID_PARAMETER  Invalid phase parameter
 132    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 133                                   This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
 134                                   previously submitted resource requests cannot be fulfilled or
 135                                   were only partially fulfilled.
 136    @retval EFI_SUCCESS            The notification was accepted without any errors.
 137
 138 **/
 139 EFI_STATUS
 140 EFIAPI
 141 NotifyPhase(
 142   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 143   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase
 144   );
 145
 146 /**
 147    Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
 148
 149    This function is called multiple times to retrieve the device handles of all the PCI root bridges that
 150    are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
 151    root bridges. On each call, the handle that was returned by the previous call is passed into the
 152    interface, and on output the interface returns the device handle of the next PCI root bridge. The
 153    caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
 154    for that root bridge. When there are no more PCI root bridges to report, the interface returns
 155    EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
 156    are returned by this function.
 157    For D945 implementation, there is only one root bridge in PCI host bridge.
 158
 159    @param[in]       This              The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 160    @param[in, out]  RootBridgeHandle  Returns the device handle of the next PCI root bridge.
 161
 162    @retval EFI_SUCCESS            If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
 163                                   specific Host bridge and return EFI_SUCCESS.
 164    @retval EFI_NOT_FOUND          Can not find the any more root bridge in specific host bridge.
 165    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not an EFI_HANDLE that was
 166                                   returned on a previous call to GetNextRootBridge().
 167 **/
 168 EFI_STATUS
 169 EFIAPI
 170 GetNextRootBridge(
 171   IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 172   IN OUT   EFI_HANDLE                                       *RootBridgeHandle
 173   );
 174
 175 /**
 176    Returns the allocation attributes of a PCI root bridge.
 177
 178    The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
 179    from one PCI root bridge to another. These attributes are different from the decode-related
 180    attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
 181    RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
 182    handles of all the root bridges that are associated with this host bridge must be obtained by calling
 183    GetNextRootBridge(). The attributes are static in the sense that they do not change during or
 184    after the enumeration process. The hardware may provide mechanisms to change the attributes on
 185    the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
 186    installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
 187    "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
 188    For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
 189    include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
 190    prefetchable memory.
 191       Attribute                                 Description
 192    ------------------------------------         ----------------------------------------------------------------------
 193    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM         If this bit is set, then the PCI root bridge does not support separate
 194                                                 windows for nonprefetchable and prefetchable memory. A PCI bus
 195                                                 driver needs to include requests for prefetchable memory in the
 196                                                 nonprefetchable memory pool.
 197
 198    EFI_PCI_HOST_BRIDGE_MEM64_DECODE             If this bit is set, then the PCI root bridge supports 64-bit memory
 199                                                 windows. If this bit is not set, the PCI bus driver needs to include
 200                                                 requests for a 64-bit memory address in the corresponding 32-bit
 201                                                 memory pool.
 202
 203    @param[in]   This               The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 204    @param[in]   RootBridgeHandle   The device handle of the PCI root bridge in which the caller is interested. Type
 205                                    EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 206    @param[out]  Attributes         The pointer to attribte of root bridge, it is output parameter
 207
 208    @retval EFI_INVALID_PARAMETER   Attribute pointer is NULL
 209    @retval EFI_INVALID_PARAMETER   RootBridgehandle is invalid.
 210    @retval EFI_SUCCESS             Success to get attribute of interested root bridge.
 211
 212 **/
 213 EFI_STATUS
 214 EFIAPI
 215 GetAttributes(
 216   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 217   IN  EFI_HANDLE                                       RootBridgeHandle,
 218   OUT UINT64                                           *Attributes
 219   );
 220
 221 /**
 222    Sets up the specified PCI root bridge for the bus enumeration process.
 223
 224    This member function sets up the root bridge for bus enumeration and returns the PCI bus range
 225    over which the search should be performed in ACPI 2.0 resource descriptor format.
 226
 227    @param[in]   This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
 228    @param[in]   RootBridgeHandle  The PCI Root Bridge to be set up.
 229    @param[out]  Configuration     Pointer to the pointer to the PCI bus resource descriptor.
 230
 231    @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
 232    @retval EFI_OUT_OF_RESOURCES  Fail to allocate ACPI resource descriptor tag.
 233    @retval EFI_SUCCESS           Sucess to allocate ACPI resource descriptor.
 234
 235 **/
 236 EFI_STATUS
 237 EFIAPI
 238 StartBusEnumeration(
 239   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 240   IN  EFI_HANDLE                                       RootBridgeHandle,
 241   OUT VOID                                             **Configuration
 242   );
 243
 244 /**
 245    Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
 246
 247    This member function programs the specified PCI root bridge to decode the bus range that is
 248    specified by the input parameter Configuration.
 249    The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
 250
 251    @param[in] This              The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
 252    @param[in] RootBridgeHandle  The PCI Root Bridge whose bus range is to be programmed
 253    @param[in] Configuration     The pointer to the PCI bus resource descriptor
 254
 255    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 256    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 257    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 258    @retval EFI_INVALID_PARAMETER  Configuration does not include a valid ACPI 2.0 bus resource descriptor.
 259    @retval EFI_INVALID_PARAMETER  Configuration includes valid ACPI 2.0 resource descriptors other than
 260                                   bus descriptors.
 261    @retval EFI_INVALID_PARAMETER  Configuration contains one or more invalid ACPI resource descriptors.
 262    @retval EFI_INVALID_PARAMETER  "Address Range Minimum" is invalid for this root bridge.
 263    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this root bridge.
 264    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 265    @retval EFI_SUCCESS            The bus range for the PCI root bridge was programmed.
 266
 267 **/
 268 EFI_STATUS
 269 EFIAPI
 270 SetBusNumbers(
 271   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 272   IN EFI_HANDLE                                       RootBridgeHandle,
 273   IN VOID                                             *Configuration
 274   );
 275
 276 /**
 277    Submits the I/O and memory resource requirements for the specified PCI root bridge.
 278
 279    This function is used to submit all the I/O and memory resources that are required by the specified
 280    PCI root bridge. The input parameter Configuration is used to specify the following:
 281    - The various types of resources that are required
 282    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 283
 284    @param[in] This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 285    @param[in] RootBridgeHandle  The PCI root bridge whose I/O and memory resource requirements are being submitted.
 286    @param[in] Configuration     The pointer to the PCI I/O and PCI memory resource descriptor.
 287
 288    @retval EFI_SUCCESS            The I/O and memory resource requests for a PCI root bridge were accepted.
 289    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 290    @retval EFI_INVALID_PARAMETER  Configuration is NULL.
 291    @retval EFI_INVALID_PARAMETER  Configuration does not point to a valid ACPI 2.0 resource descriptor.
 292    @retval EFI_INVALID_PARAMETER  Configuration includes requests for one or more resource types that are
 293                                   not supported by this PCI root bridge. This error will happen if the caller
 294                                   did not combine resources according to Attributes that were returned by
 295                                   GetAllocAttributes().
 296    @retval EFI_INVALID_PARAMETER  Address Range Maximum" is invalid.
 297    @retval EFI_INVALID_PARAMETER  "Address Range Length" is invalid for this PCI root bridge.
 298    @retval EFI_INVALID_PARAMETER  "Address Space Granularity" is invalid for this PCI root bridge.
 299
 300 **/
 301 EFI_STATUS
 302 EFIAPI
 303 SubmitResources(
 304   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 305   IN EFI_HANDLE                                       RootBridgeHandle,
 306   IN VOID                                             *Configuration
 307   );
 308
 309 /**
 310    Returns the proposed resource settings for the specified PCI root bridge.
 311
 312    This member function returns the proposed resource settings for the specified PCI root bridge. The
 313    proposed resource settings are prepared when NotifyPhase() is called with a Phase of
 314    EfiPciHostBridgeAllocateResources. The output parameter Configuration
 315    specifies the following:
 316    - The various types of resources, excluding bus resources, that are allocated
 317    - The associated lengths in terms of ACPI 2.0 resource descriptor format
 318
 319    @param[in]  This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 320    @param[in]  RootBridgeHandle  The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
 321    @param[out] Configuration     The pointer to the pointer to the PCI I/O and memory resource descriptor.
 322
 323    @retval EFI_SUCCESS            The requested parameters were returned.
 324    @retval EFI_INVALID_PARAMETER  RootBridgeHandle is not a valid root bridge handle.
 325    @retval EFI_DEVICE_ERROR       Programming failed due to a hardware error.
 326    @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 327
 328 **/
 329 EFI_STATUS
 330 EFIAPI
 331 GetProposedResources(
 332   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
 333   IN  EFI_HANDLE                                       RootBridgeHandle,
 334   OUT VOID                                             **Configuration
 335   );
 336
 337 /**
 338    Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
 339    stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
 340    PCI controllers before enumeration.
 341
 342    This function is called during the PCI enumeration process. No specific action is expected from this
 343    member function. It allows the host bridge driver to preinitialize individual PCI controllers before
 344    enumeration.
 345
 346    @param This              Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
 347    @param RootBridgeHandle  The associated PCI root bridge handle. Type EFI_HANDLE is defined in
 348                             InstallProtocolInterface() in the UEFI 2.0 Specification.
 349    @param PciAddress        The address of the PCI device on the PCI bus. This address can be passed to the
 350                             EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
 351                             configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
 352                             the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
 353    @param Phase             The phase of the PCI device enumeration.
 354
 355    @retval EFI_SUCCESS              The requested parameters were returned.
 356    @retval EFI_INVALID_PARAMETER    RootBridgeHandle is not a valid root bridge handle.
 357    @retval EFI_INVALID_PARAMETER    Phase is not a valid phase that is defined in
 358                                     EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
 359    @retval EFI_DEVICE_ERROR         Programming failed due to a hardware error. The PCI enumerator should
 360                                     not enumerate this device, including its child devices if it is a PCI-to-PCI
 361                                     bridge.
 362
 363 **/
 364 EFI_STATUS
 365 EFIAPI
 366 PreprocessController (
 367   IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,
 368   IN  EFI_HANDLE                                        RootBridgeHandle,
 369   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,
 370   IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase
 371   );
 372
 373
 374 //
 375 // Define resource status constant
 376 //
 377 #define EFI_RESOURCE_NONEXISTENT   0xFFFFFFFFFFFFFFFFULL
 378 #define EFI_RESOURCE_LESS          0xFFFFFFFFFFFFFFFEULL
 379
 380
 381 //
 382 // Driver Instance Data Prototypes
 383 //
 384
 385 typedef struct {
 386   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 387   UINTN                                      NumberOfBytes;
 388   UINTN                                      NumberOfPages;
 389   EFI_PHYSICAL_ADDRESS                       HostAddress;
 390   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 391 } MAP_INFO;
 392
 393 typedef struct {
 394   ACPI_HID_DEVICE_PATH              AcpiDevicePath;
 395   EFI_DEVICE_PATH_PROTOCOL          EndDevicePath;
 396 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
 397
 398 typedef struct {
 399   UINT64          BusBase;
 400   UINT64          BusLimit;
 401
 402   UINT64          MemBase;
 403   UINT64          MemLimit;
 404
 405   UINT64          IoBase;
 406   UINT64          IoLimit;
 407   UINT64          IoTranslation;
 408 } PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
 409
 410 typedef enum {
 411   TypeIo = 0,
 412   TypeMem32,
 413   TypePMem32,
 414   TypeMem64,
 415   TypePMem64,
 416   TypeBus,
 417   TypeMax
 418 } PCI_RESOURCE_TYPE;
 419
 420 typedef enum {
 421   ResNone = 0,
 422   ResSubmitted,
 423   ResRequested,
 424   ResAllocated,
 425   ResStatusMax
 426 } RES_STATUS;
 427
 428 typedef struct {
 429   PCI_RESOURCE_TYPE Type;
 430   UINT64            Base;
 431   UINT64            Length;
 432   UINT64            Alignment;
 433   RES_STATUS        Status;
 434 } PCI_RES_NODE;
 435
 436 #define PCI_ROOT_BRIDGE_SIGNATURE  SIGNATURE_32('e', '2', 'p', 'b')
 437
 438 typedef struct {
 439   UINT32                 Signature;
 440   LIST_ENTRY             Link;
 441   EFI_HANDLE             Handle;
 442   UINT64                 RootBridgeAttrib;
 443   UINT64                 Attributes;
 444   UINT64                 Supports;
 445
 446   //
 447   // Specific for this memory controller: Bus, I/O, Mem
 448   //
 449   PCI_RES_NODE           ResAllocNode[6];
 450
 451   //
 452   // Addressing for Memory and I/O and Bus arrange
 453   //
 454   UINT64                 BusBase;
 455   UINT64                 MemBase;
 456   UINT64                 IoBase;
 457   UINT64                 BusLimit;
 458   UINT64                 MemLimit;
 459   UINT64                 IoLimit;
 460   UINT64                 IoTranslation;
 461
 462   EFI_DEVICE_PATH_PROTOCOL                *DevicePath;
 463   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;
 464
 465 } PCI_ROOT_BRIDGE_INSTANCE;
 466
 467
 468 //
 469 // Driver Instance Data Macros
 470 //
 471 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
 472   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
 473
 474
 475 #define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
 476   CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
 477
 478 /**
 479
 480   Construct the Pci Root Bridge Io protocol
 481
 482   @param Protocol         Point to protocol instance
 483   @param HostBridgeHandle Handle of host bridge
 484   @param Attri            Attribute of host bridge
 485   @param ResAperture      ResourceAperture for host bridge
 486
 487   @retval EFI_SUCCESS Success to initialize the Pci Root Bridge.
 488
 489 **/
 490 EFI_STATUS
 491 RootBridgeConstructor (
 492   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL    *Protocol,
 493   IN EFI_HANDLE                         HostBridgeHandle,
 494   IN UINT64                             Attri,
 495   IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE  *ResAperture
 496   );
 497
 498 #endif