BaseTools/Source/C/Common/PeCoffLoaderEx.c

   1 /** @file
   2
   3 Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
   4 This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14     PeCoffLoaderEx.c
  15
  16 Abstract:
  17
  18     IA32, X64 and IPF Specific relocation fixups
  19
  20 Revision History
  21
  22 --*/
  23
  24 #include <Common/UefiBaseTypes.h>
  25 #include <IndustryStandard/PeImage.h>
  26 #include "PeCoffLib.h"
  27 #include "CommonLib.h"
  28
  29
  30 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \
  31     Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
  32
  33 #define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \
  34     *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
  35           ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
  36
  37 #define IMM64_IMM7B_INST_WORD_X         3
  38 #define IMM64_IMM7B_SIZE_X              7
  39 #define IMM64_IMM7B_INST_WORD_POS_X     4
  40 #define IMM64_IMM7B_VAL_POS_X           0
  41
  42 #define IMM64_IMM9D_INST_WORD_X         3
  43 #define IMM64_IMM9D_SIZE_X              9
  44 #define IMM64_IMM9D_INST_WORD_POS_X     18
  45 #define IMM64_IMM9D_VAL_POS_X           7
  46
  47 #define IMM64_IMM5C_INST_WORD_X         3
  48 #define IMM64_IMM5C_SIZE_X              5
  49 #define IMM64_IMM5C_INST_WORD_POS_X     13
  50 #define IMM64_IMM5C_VAL_POS_X           16
  51
  52 #define IMM64_IC_INST_WORD_X            3
  53 #define IMM64_IC_SIZE_X                 1
  54 #define IMM64_IC_INST_WORD_POS_X        12
  55 #define IMM64_IC_VAL_POS_X              21
  56
  57 #define IMM64_IMM41a_INST_WORD_X        1
  58 #define IMM64_IMM41a_SIZE_X             10
  59 #define IMM64_IMM41a_INST_WORD_POS_X    14
  60 #define IMM64_IMM41a_VAL_POS_X          22
  61
  62 #define IMM64_IMM41b_INST_WORD_X        1
  63 #define IMM64_IMM41b_SIZE_X             8
  64 #define IMM64_IMM41b_INST_WORD_POS_X    24
  65 #define IMM64_IMM41b_VAL_POS_X          32
  66
  67 #define IMM64_IMM41c_INST_WORD_X        2
  68 #define IMM64_IMM41c_SIZE_X             23
  69 #define IMM64_IMM41c_INST_WORD_POS_X    0
  70 #define IMM64_IMM41c_VAL_POS_X          40
  71
  72 #define IMM64_SIGN_INST_WORD_X          3
  73 #define IMM64_SIGN_SIZE_X               1
  74 #define IMM64_SIGN_INST_WORD_POS_X      27
  75 #define IMM64_SIGN_VAL_POS_X            63
  76
  77 RETURN_STATUS
  78 PeCoffLoaderRelocateIa32Image (
  79   IN UINT16      *Reloc,
  80   IN OUT CHAR8   *Fixup,
  81   IN OUT CHAR8   **FixupData,
  82   IN UINT64      Adjust
  83   )
  84 /*++
  85
  86 Routine Description:
  87
  88   Performs an IA-32 specific relocation fixup
  89
  90 Arguments:
  91
  92   Reloc      - Pointer to the relocation record
  93
  94   Fixup      - Pointer to the address to fix up
  95
  96   FixupData  - Pointer to a buffer to log the fixups
  97
  98   Adjust     - The offset to adjust the fixup
  99
 100 Returns:
 101
 102   EFI_UNSUPPORTED   - Unsupported now
 103
 104 --*/
 105 {
 106   return RETURN_UNSUPPORTED;
 107 }
 108
 109 RETURN_STATUS
 110 PeCoffLoaderRelocateIpfImage (
 111   IN UINT16      *Reloc,
 112   IN OUT CHAR8   *Fixup,
 113   IN OUT CHAR8   **FixupData,
 114   IN UINT64      Adjust
 115   )
 116 /*++
 117
 118 Routine Description:
 119
 120   Performs an Itanium-based specific relocation fixup
 121
 122 Arguments:
 123
 124   Reloc      - Pointer to the relocation record
 125
 126   Fixup      - Pointer to the address to fix up
 127
 128   FixupData  - Pointer to a buffer to log the fixups
 129
 130   Adjust     - The offset to adjust the fixup
 131
 132 Returns:
 133
 134   Status code
 135
 136 --*/
 137 {
 138   UINT64      *F64;
 139   UINT64      FixupVal;
 140
 141   switch ((*Reloc) >> 12) {
 142
 143     case EFI_IMAGE_REL_BASED_DIR64:
 144       F64 = (UINT64 *) Fixup;
 145       *F64 = *F64 + (UINT64) Adjust;
 146       if (*FixupData != NULL) {
 147         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 148         *(UINT64 *)(*FixupData) = *F64;
 149         *FixupData = *FixupData + sizeof(UINT64);
 150       }
 151       break;
 152
 153     case EFI_IMAGE_REL_BASED_IA64_IMM64:
 154
 155       //
 156       // Align it to bundle address before fixing up the
 157       // 64-bit immediate value of the movl instruction.
 158       //
 159
 160       Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
 161       FixupVal = (UINT64)0;
 162
 163       //
 164       // Extract the lower 32 bits of IMM64 from bundle
 165       //
 166       EXT_IMM64(FixupVal,
 167                 (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
 168                 IMM64_IMM7B_SIZE_X,
 169                 IMM64_IMM7B_INST_WORD_POS_X,
 170                 IMM64_IMM7B_VAL_POS_X
 171                 );
 172
 173       EXT_IMM64(FixupVal,
 174                 (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
 175                 IMM64_IMM9D_SIZE_X,
 176                 IMM64_IMM9D_INST_WORD_POS_X,
 177                 IMM64_IMM9D_VAL_POS_X
 178                 );
 179
 180       EXT_IMM64(FixupVal,
 181                 (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
 182                 IMM64_IMM5C_SIZE_X,
 183                 IMM64_IMM5C_INST_WORD_POS_X,
 184                 IMM64_IMM5C_VAL_POS_X
 185                 );
 186
 187       EXT_IMM64(FixupVal,
 188                 (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
 189                 IMM64_IC_SIZE_X,
 190                 IMM64_IC_INST_WORD_POS_X,
 191                 IMM64_IC_VAL_POS_X
 192                 );
 193
 194       EXT_IMM64(FixupVal,
 195                 (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,
 196                 IMM64_IMM41a_SIZE_X,
 197                 IMM64_IMM41a_INST_WORD_POS_X,
 198                 IMM64_IMM41a_VAL_POS_X
 199                 );
 200
 201       //
 202       // Update 64-bit address
 203       //
 204       FixupVal += Adjust;
 205
 206       //
 207       // Insert IMM64 into bundle
 208       //
 209       INS_IMM64(FixupVal,
 210                 ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
 211                 IMM64_IMM7B_SIZE_X,
 212                 IMM64_IMM7B_INST_WORD_POS_X,
 213                 IMM64_IMM7B_VAL_POS_X
 214                 );
 215
 216       INS_IMM64(FixupVal,
 217                 ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
 218                 IMM64_IMM9D_SIZE_X,
 219                 IMM64_IMM9D_INST_WORD_POS_X,
 220                 IMM64_IMM9D_VAL_POS_X
 221                 );
 222
 223       INS_IMM64(FixupVal,
 224                 ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
 225                 IMM64_IMM5C_SIZE_X,
 226                 IMM64_IMM5C_INST_WORD_POS_X,
 227                 IMM64_IMM5C_VAL_POS_X
 228                 );
 229
 230       INS_IMM64(FixupVal,
 231                 ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
 232                 IMM64_IC_SIZE_X,
 233                 IMM64_IC_INST_WORD_POS_X,
 234                 IMM64_IC_VAL_POS_X
 235                 );
 236
 237       INS_IMM64(FixupVal,
 238                 ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),
 239                 IMM64_IMM41a_SIZE_X,
 240                 IMM64_IMM41a_INST_WORD_POS_X,
 241                 IMM64_IMM41a_VAL_POS_X
 242                 );
 243
 244       INS_IMM64(FixupVal,
 245                 ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),
 246                 IMM64_IMM41b_SIZE_X,
 247                 IMM64_IMM41b_INST_WORD_POS_X,
 248                 IMM64_IMM41b_VAL_POS_X
 249                 );
 250
 251       INS_IMM64(FixupVal,
 252                 ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),
 253                 IMM64_IMM41c_SIZE_X,
 254                 IMM64_IMM41c_INST_WORD_POS_X,
 255                 IMM64_IMM41c_VAL_POS_X
 256                 );
 257
 258       INS_IMM64(FixupVal,
 259                 ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
 260                 IMM64_SIGN_SIZE_X,
 261                 IMM64_SIGN_INST_WORD_POS_X,
 262                 IMM64_SIGN_VAL_POS_X
 263                 );
 264
 265       F64 = (UINT64 *) Fixup;
 266       if (*FixupData != NULL) {
 267         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 268         *(UINT64 *)(*FixupData) = *F64;
 269         *FixupData = *FixupData + sizeof(UINT64);
 270       }
 271       break;
 272
 273     default:
 274       return RETURN_UNSUPPORTED;
 275   }
 276
 277   return RETURN_SUCCESS;
 278 }
 279
 280 RETURN_STATUS
 281 PeCoffLoaderRelocateX64Image (
 282   IN     UINT16       *Reloc,
 283   IN OUT CHAR8        *Fixup,
 284   IN OUT CHAR8        **FixupData,
 285   IN     UINT64       Adjust
 286   )
 287 /**
 288   Performs an x64 specific relocation fixup
 289
 290   @param Reloc        Pointer to the relocation record
 291   @param Fixup        Pointer to the address to fix up
 292   @param FixupData    Pointer to a buffer to log the fixups
 293   @param Adjust       The offset to adjust the fixup
 294
 295   @retval RETURN_SUCCESS      Success to perform relocation
 296   @retval RETURN_UNSUPPORTED  Unsupported.
 297 **/
 298 {
 299   UINT64      *F64;
 300
 301   switch ((*Reloc) >> 12) {
 302
 303     case EFI_IMAGE_REL_BASED_DIR64:
 304       F64 = (UINT64 *) Fixup;
 305       *F64 = *F64 + (UINT64) Adjust;
 306       if (*FixupData != NULL) {
 307         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 308         *(UINT64 *)(*FixupData) = *F64;
 309         *FixupData = *FixupData + sizeof(UINT64);
 310       }
 311       break;
 312
 313     default:
 314       return RETURN_UNSUPPORTED;
 315   }
 316
 317   return RETURN_SUCCESS;
 318 }
 319
 320 /**
 321   Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and
 322   return the immediate data encoded in the instruction
 323
 324   @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction
 325
 326   @return Immediate address encoded in the instruction
 327
 328 **/
 329 UINT16
 330 ThumbMovtImmediateAddress (
 331   IN UINT16 *Instruction
 332   )
 333 {
 334   UINT32  Movt;
 335   UINT16  Address;
 336
 337   // Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
 338   // Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
 339   Movt = (*Instruction << 16) | (*(Instruction + 1));
 340
 341   // imm16 = imm4:i:imm3:imm8
 342   //         imm4 -> Bit19:Bit16
 343   //         i    -> Bit26
 344   //         imm3 -> Bit14:Bit12
 345   //         imm8 -> Bit7:Bit0
 346   Address  = (UINT16)(Movt & 0x000000ff);          // imm8
 347   Address |= (UINT16)((Movt >> 4) &  0x0000f700);  // imm4 imm3
 348   Address |= (((Movt & BIT26) != 0) ? BIT11 : 0);  // i
 349   return Address;
 350 }
 351
 352
 353 /**
 354   Update an ARM MOVT or MOVW immediate instruction immediate data.
 355
 356   @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction
 357   @param  Address       New addres to patch into the instruction
 358 **/
 359 VOID
 360 ThumbMovtImmediatePatch (
 361   IN OUT UINT16 *Instruction,
 362   IN     UINT16 Address
 363   )
 364 {
 365   UINT16  Patch;
 366
 367   // First 16-bit chunk of instruciton
 368   Patch  = ((Address >> 12) & 0x000f);             // imm4
 369   Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
 370   *Instruction = (*Instruction & ~0x040f) | Patch;
 371
 372   // Second 16-bit chunk of instruction
 373   Patch  =  Address & 0x000000ff;          // imm8
 374   Patch |=  ((Address << 4) & 0x00007000); // imm3
 375   Instruction++;
 376   *Instruction = (*Instruction & ~0x70ff) | Patch;
 377 }
 378
 379 /**
 380   Pass in a pointer to an ARM MOVW/MOVT instruciton pair and
 381   return the immediate data encoded in the two` instruction
 382
 383   @param  Instructions  Pointer to ARM MOVW/MOVT insturction pair
 384
 385   @return Immediate address encoded in the instructions
 386
 387 **/
 388 UINT32
 389 EFIAPI
 390 ThumbMovwMovtImmediateAddress (
 391   IN UINT16 *Instructions
 392   )
 393 {
 394   UINT16  *Word;
 395   UINT16  *Top;
 396
 397   Word = Instructions;  // MOVW
 398   Top  = Word + 2;      // MOVT
 399
 400   return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);
 401 }
 402
 403
 404 /**
 405   Update an ARM MOVW/MOVT immediate instruction instruction pair.
 406
 407   @param  Instructions  Pointer to ARM MOVW/MOVT instruction pair
 408   @param  Address       New addres to patch into the instructions
 409 **/
 410 VOID
 411 EFIAPI
 412 ThumbMovwMovtImmediatePatch (
 413   IN OUT UINT16 *Instructions,
 414   IN     UINT32 Address
 415   )
 416 {
 417   UINT16  *Word;
 418   UINT16  *Top;
 419
 420   Word = (UINT16 *)Instructions;  // MOVW
 421   Top  = Word + 2;                // MOVT
 422
 423   ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));
 424   ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));
 425 }
 426
 427
 428 /**
 429   Performs an ARM-based specific relocation fixup and is a no-op on other
 430   instruction sets.
 431
 432   @param  Reloc       Pointer to the relocation record.
 433   @param  Fixup       Pointer to the address to fix up.
 434   @param  FixupData   Pointer to a buffer to log the fixups.
 435   @param  Adjust      The offset to adjust the fixup.
 436
 437   @return Status code.
 438
 439 **/
 440 RETURN_STATUS
 441 PeCoffLoaderRelocateArmImage (
 442   IN UINT16      **Reloc,
 443   IN OUT CHAR8   *Fixup,
 444   IN OUT CHAR8   **FixupData,
 445   IN UINT64      Adjust
 446   )
 447 {
 448   UINT16      *Fixup16;
 449   UINT32      FixupVal;
 450
 451   Fixup16   = (UINT16 *) Fixup;
 452
 453   switch ((**Reloc) >> 12) {
 454
 455   case EFI_IMAGE_REL_BASED_ARM_MOV32T:
 456     FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
 457     ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
 458
 459
 460     if (*FixupData != NULL) {
 461       *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 462       *(UINT64 *)(*FixupData) = *Fixup16;
 463       CopyMem (*FixupData, Fixup16, sizeof (UINT64));
 464     }
 465     break;
 466
 467   case EFI_IMAGE_REL_BASED_ARM_MOV32A:
 468      // break omitted - ARM instruction encoding not implemented
 469   default:
 470     return RETURN_UNSUPPORTED;
 471   }
 472
 473   return RETURN_SUCCESS;
 474 }