BaseTools/Source/C/Common/PeCoffLoaderEx.c

   1 /** @file
   2
   3 Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
   4 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
   5 This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 Module Name:
  14
  15     PeCoffLoaderEx.c
  16
  17 Abstract:
  18
  19     IA32, X64, IPF, ARM and AArch64 Specific relocation fixups
  20
  21 Revision History
  22
  23 --*/
  24
  25 #include <Common/UefiBaseTypes.h>
  26 #include <IndustryStandard/PeImage.h>
  27 #include "PeCoffLib.h"
  28 #include "CommonLib.h"
  29 #include "EfiUtilityMsgs.h"
  30
  31
  32 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \
  33     Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
  34
  35 #define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \
  36     *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
  37           ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
  38
  39 #define IMM64_IMM7B_INST_WORD_X         3
  40 #define IMM64_IMM7B_SIZE_X              7
  41 #define IMM64_IMM7B_INST_WORD_POS_X     4
  42 #define IMM64_IMM7B_VAL_POS_X           0
  43
  44 #define IMM64_IMM9D_INST_WORD_X         3
  45 #define IMM64_IMM9D_SIZE_X              9
  46 #define IMM64_IMM9D_INST_WORD_POS_X     18
  47 #define IMM64_IMM9D_VAL_POS_X           7
  48
  49 #define IMM64_IMM5C_INST_WORD_X         3
  50 #define IMM64_IMM5C_SIZE_X              5
  51 #define IMM64_IMM5C_INST_WORD_POS_X     13
  52 #define IMM64_IMM5C_VAL_POS_X           16
  53
  54 #define IMM64_IC_INST_WORD_X            3
  55 #define IMM64_IC_SIZE_X                 1
  56 #define IMM64_IC_INST_WORD_POS_X        12
  57 #define IMM64_IC_VAL_POS_X              21
  58
  59 #define IMM64_IMM41a_INST_WORD_X        1
  60 #define IMM64_IMM41a_SIZE_X             10
  61 #define IMM64_IMM41a_INST_WORD_POS_X    14
  62 #define IMM64_IMM41a_VAL_POS_X          22
  63
  64 #define IMM64_IMM41b_INST_WORD_X        1
  65 #define IMM64_IMM41b_SIZE_X             8
  66 #define IMM64_IMM41b_INST_WORD_POS_X    24
  67 #define IMM64_IMM41b_VAL_POS_X          32
  68
  69 #define IMM64_IMM41c_INST_WORD_X        2
  70 #define IMM64_IMM41c_SIZE_X             23
  71 #define IMM64_IMM41c_INST_WORD_POS_X    0
  72 #define IMM64_IMM41c_VAL_POS_X          40
  73
  74 #define IMM64_SIGN_INST_WORD_X          3
  75 #define IMM64_SIGN_SIZE_X               1
  76 #define IMM64_SIGN_INST_WORD_POS_X      27
  77 #define IMM64_SIGN_VAL_POS_X            63
  78
  79 RETURN_STATUS
  80 PeCoffLoaderRelocateIa32Image (
  81   IN UINT16      *Reloc,
  82   IN OUT CHAR8   *Fixup,
  83   IN OUT CHAR8   **FixupData,
  84   IN UINT64      Adjust
  85   )
  86 /*++
  87
  88 Routine Description:
  89
  90   Performs an IA-32 specific relocation fixup
  91
  92 Arguments:
  93
  94   Reloc      - Pointer to the relocation record
  95
  96   Fixup      - Pointer to the address to fix up
  97
  98   FixupData  - Pointer to a buffer to log the fixups
  99
 100   Adjust     - The offset to adjust the fixup
 101
 102 Returns:
 103
 104   EFI_UNSUPPORTED   - Unsupported now
 105
 106 --*/
 107 {
 108   return RETURN_UNSUPPORTED;
 109 }
 110
 111 RETURN_STATUS
 112 PeCoffLoaderRelocateIpfImage (
 113   IN UINT16      *Reloc,
 114   IN OUT CHAR8   *Fixup,
 115   IN OUT CHAR8   **FixupData,
 116   IN UINT64      Adjust
 117   )
 118 /*++
 119
 120 Routine Description:
 121
 122   Performs an Itanium-based specific relocation fixup
 123
 124 Arguments:
 125
 126   Reloc      - Pointer to the relocation record
 127
 128   Fixup      - Pointer to the address to fix up
 129
 130   FixupData  - Pointer to a buffer to log the fixups
 131
 132   Adjust     - The offset to adjust the fixup
 133
 134 Returns:
 135
 136   Status code
 137
 138 --*/
 139 {
 140   UINT64      *F64;
 141   UINT64      FixupVal;
 142
 143   switch ((*Reloc) >> 12) {
 144
 145     case EFI_IMAGE_REL_BASED_DIR64:
 146       F64 = (UINT64 *) Fixup;
 147       *F64 = *F64 + (UINT64) Adjust;
 148       if (*FixupData != NULL) {
 149         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 150         *(UINT64 *)(*FixupData) = *F64;
 151         *FixupData = *FixupData + sizeof(UINT64);
 152       }
 153       break;
 154
 155     case EFI_IMAGE_REL_BASED_IA64_IMM64:
 156
 157       //
 158       // Align it to bundle address before fixing up the
 159       // 64-bit immediate value of the movl instruction.
 160       //
 161
 162       Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
 163       FixupVal = (UINT64)0;
 164
 165       //
 166       // Extract the lower 32 bits of IMM64 from bundle
 167       //
 168       EXT_IMM64(FixupVal,
 169                 (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
 170                 IMM64_IMM7B_SIZE_X,
 171                 IMM64_IMM7B_INST_WORD_POS_X,
 172                 IMM64_IMM7B_VAL_POS_X
 173                 );
 174
 175       EXT_IMM64(FixupVal,
 176                 (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
 177                 IMM64_IMM9D_SIZE_X,
 178                 IMM64_IMM9D_INST_WORD_POS_X,
 179                 IMM64_IMM9D_VAL_POS_X
 180                 );
 181
 182       EXT_IMM64(FixupVal,
 183                 (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
 184                 IMM64_IMM5C_SIZE_X,
 185                 IMM64_IMM5C_INST_WORD_POS_X,
 186                 IMM64_IMM5C_VAL_POS_X
 187                 );
 188
 189       EXT_IMM64(FixupVal,
 190                 (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
 191                 IMM64_IC_SIZE_X,
 192                 IMM64_IC_INST_WORD_POS_X,
 193                 IMM64_IC_VAL_POS_X
 194                 );
 195
 196       EXT_IMM64(FixupVal,
 197                 (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,
 198                 IMM64_IMM41a_SIZE_X,
 199                 IMM64_IMM41a_INST_WORD_POS_X,
 200                 IMM64_IMM41a_VAL_POS_X
 201                 );
 202
 203       //
 204       // Update 64-bit address
 205       //
 206       FixupVal += Adjust;
 207
 208       //
 209       // Insert IMM64 into bundle
 210       //
 211       INS_IMM64(FixupVal,
 212                 ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
 213                 IMM64_IMM7B_SIZE_X,
 214                 IMM64_IMM7B_INST_WORD_POS_X,
 215                 IMM64_IMM7B_VAL_POS_X
 216                 );
 217
 218       INS_IMM64(FixupVal,
 219                 ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
 220                 IMM64_IMM9D_SIZE_X,
 221                 IMM64_IMM9D_INST_WORD_POS_X,
 222                 IMM64_IMM9D_VAL_POS_X
 223                 );
 224
 225       INS_IMM64(FixupVal,
 226                 ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
 227                 IMM64_IMM5C_SIZE_X,
 228                 IMM64_IMM5C_INST_WORD_POS_X,
 229                 IMM64_IMM5C_VAL_POS_X
 230                 );
 231
 232       INS_IMM64(FixupVal,
 233                 ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
 234                 IMM64_IC_SIZE_X,
 235                 IMM64_IC_INST_WORD_POS_X,
 236                 IMM64_IC_VAL_POS_X
 237                 );
 238
 239       INS_IMM64(FixupVal,
 240                 ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),
 241                 IMM64_IMM41a_SIZE_X,
 242                 IMM64_IMM41a_INST_WORD_POS_X,
 243                 IMM64_IMM41a_VAL_POS_X
 244                 );
 245
 246       INS_IMM64(FixupVal,
 247                 ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),
 248                 IMM64_IMM41b_SIZE_X,
 249                 IMM64_IMM41b_INST_WORD_POS_X,
 250                 IMM64_IMM41b_VAL_POS_X
 251                 );
 252
 253       INS_IMM64(FixupVal,
 254                 ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),
 255                 IMM64_IMM41c_SIZE_X,
 256                 IMM64_IMM41c_INST_WORD_POS_X,
 257                 IMM64_IMM41c_VAL_POS_X
 258                 );
 259
 260       INS_IMM64(FixupVal,
 261                 ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
 262                 IMM64_SIGN_SIZE_X,
 263                 IMM64_SIGN_INST_WORD_POS_X,
 264                 IMM64_SIGN_VAL_POS_X
 265                 );
 266
 267       F64 = (UINT64 *) Fixup;
 268       if (*FixupData != NULL) {
 269         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 270         *(UINT64 *)(*FixupData) = *F64;
 271         *FixupData = *FixupData + sizeof(UINT64);
 272       }
 273       break;
 274
 275     default:
 276       return RETURN_UNSUPPORTED;
 277   }
 278
 279   return RETURN_SUCCESS;
 280 }
 281
 282 RETURN_STATUS
 283 PeCoffLoaderRelocateX64Image (
 284   IN     UINT16       *Reloc,
 285   IN OUT CHAR8        *Fixup,
 286   IN OUT CHAR8        **FixupData,
 287   IN     UINT64       Adjust
 288   )
 289 /**
 290   Performs an x64 specific relocation fixup
 291
 292   @param Reloc        Pointer to the relocation record
 293   @param Fixup        Pointer to the address to fix up
 294   @param FixupData    Pointer to a buffer to log the fixups
 295   @param Adjust       The offset to adjust the fixup
 296
 297   @retval RETURN_SUCCESS      Success to perform relocation
 298   @retval RETURN_UNSUPPORTED  Unsupported.
 299 **/
 300 {
 301   UINT64      *F64;
 302
 303   switch ((*Reloc) >> 12) {
 304
 305     case EFI_IMAGE_REL_BASED_DIR64:
 306       F64 = (UINT64 *) Fixup;
 307       *F64 = *F64 + (UINT64) Adjust;
 308       if (*FixupData != NULL) {
 309         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 310         *(UINT64 *)(*FixupData) = *F64;
 311         *FixupData = *FixupData + sizeof(UINT64);
 312       }
 313       break;
 314
 315     default:
 316       return RETURN_UNSUPPORTED;
 317   }
 318
 319   return RETURN_SUCCESS;
 320 }
 321
 322 /**
 323   Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and
 324   return the immediate data encoded in the instruction
 325
 326   @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction
 327
 328   @return Immediate address encoded in the instruction
 329
 330 **/
 331 UINT16
 332 ThumbMovtImmediateAddress (
 333   IN UINT16 *Instruction
 334   )
 335 {
 336   UINT32  Movt;
 337   UINT16  Address;
 338
 339   // Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
 340   // Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
 341   Movt = (*Instruction << 16) | (*(Instruction + 1));
 342
 343   // imm16 = imm4:i:imm3:imm8
 344   //         imm4 -> Bit19:Bit16
 345   //         i    -> Bit26
 346   //         imm3 -> Bit14:Bit12
 347   //         imm8 -> Bit7:Bit0
 348   Address  = (UINT16)(Movt & 0x000000ff);          // imm8
 349   Address |= (UINT16)((Movt >> 4) &  0x0000f700);  // imm4 imm3
 350   Address |= (((Movt & BIT26) != 0) ? BIT11 : 0);  // i
 351   return Address;
 352 }
 353
 354
 355 /**
 356   Update an ARM MOVT or MOVW immediate instruction immediate data.
 357
 358   @param  Instruction   Pointer to ARM MOVT or MOVW immediate instruction
 359   @param  Address       New addres to patch into the instruction
 360 **/
 361 VOID
 362 ThumbMovtImmediatePatch (
 363   IN OUT UINT16 *Instruction,
 364   IN     UINT16 Address
 365   )
 366 {
 367   UINT16  Patch;
 368
 369   // First 16-bit chunk of instruciton
 370   Patch  = ((Address >> 12) & 0x000f);             // imm4
 371   Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
 372   *Instruction = (*Instruction & ~0x040f) | Patch;
 373
 374   // Second 16-bit chunk of instruction
 375   Patch  =  Address & 0x000000ff;          // imm8
 376   Patch |=  ((Address << 4) & 0x00007000); // imm3
 377   Instruction++;
 378   *Instruction = (*Instruction & ~0x70ff) | Patch;
 379 }
 380
 381 /**
 382   Pass in a pointer to an ARM MOVW/MOVT instruciton pair and
 383   return the immediate data encoded in the two` instruction
 384
 385   @param  Instructions  Pointer to ARM MOVW/MOVT insturction pair
 386
 387   @return Immediate address encoded in the instructions
 388
 389 **/
 390 UINT32
 391 EFIAPI
 392 ThumbMovwMovtImmediateAddress (
 393   IN UINT16 *Instructions
 394   )
 395 {
 396   UINT16  *Word;
 397   UINT16  *Top;
 398
 399   Word = Instructions;  // MOVW
 400   Top  = Word + 2;      // MOVT
 401
 402   return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);
 403 }
 404
 405
 406 /**
 407   Update an ARM MOVW/MOVT immediate instruction instruction pair.
 408
 409   @param  Instructions  Pointer to ARM MOVW/MOVT instruction pair
 410   @param  Address       New addres to patch into the instructions
 411 **/
 412 VOID
 413 EFIAPI
 414 ThumbMovwMovtImmediatePatch (
 415   IN OUT UINT16 *Instructions,
 416   IN     UINT32 Address
 417   )
 418 {
 419   UINT16  *Word;
 420   UINT16  *Top;
 421
 422   Word = (UINT16 *)Instructions;  // MOVW
 423   Top  = Word + 2;                // MOVT
 424
 425   ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));
 426   ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));
 427 }
 428
 429
 430 /**
 431   Performs an ARM-based specific relocation fixup and is a no-op on other
 432   instruction sets.
 433
 434   @param  Reloc       Pointer to the relocation record.
 435   @param  Fixup       Pointer to the address to fix up.
 436   @param  FixupData   Pointer to a buffer to log the fixups.
 437   @param  Adjust      The offset to adjust the fixup.
 438
 439   @return Status code.
 440
 441 **/
 442 RETURN_STATUS
 443 PeCoffLoaderRelocateArmImage (
 444   IN UINT16      **Reloc,
 445   IN OUT CHAR8   *Fixup,
 446   IN OUT CHAR8   **FixupData,
 447   IN UINT64      Adjust
 448   )
 449 {
 450   UINT16      *Fixup16;
 451   UINT32      FixupVal;
 452
 453   Fixup16   = (UINT16 *) Fixup;
 454
 455   switch ((**Reloc) >> 12) {
 456
 457   case EFI_IMAGE_REL_BASED_ARM_MOV32T:
 458     FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
 459     ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
 460
 461
 462     if (*FixupData != NULL) {
 463       *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 464       *(UINT64 *)(*FixupData) = *Fixup16;
 465       CopyMem (*FixupData, Fixup16, sizeof (UINT64));
 466     }
 467     break;
 468
 469   case EFI_IMAGE_REL_BASED_ARM_MOV32A:
 470      // break omitted - ARM instruction encoding not implemented
 471   default:
 472     return RETURN_UNSUPPORTED;
 473   }
 474
 475   return RETURN_SUCCESS;
 476 }
 477
 478 RETURN_STATUS
 479 PeCoffLoaderRelocateAArch64Image (
 480   IN     UINT16       *Reloc,
 481   IN OUT CHAR8        *Fixup,
 482   IN OUT CHAR8        **FixupData,
 483   IN     UINT64       Adjust
 484   )
 485 /**
 486   Performs an AArch64 specific relocation fixup
 487
 488   @param Reloc        Pointer to the relocation record
 489   @param Fixup        Pointer to the address to fix up
 490   @param FixupData    Pointer to a buffer to log the fixups
 491   @param Adjust       The offset to adjust the fixup
 492
 493   @retval RETURN_SUCCESS      Success to perform relocation
 494   @retval RETURN_UNSUPPORTED  Unsupported.
 495 **/
 496 {
 497   UINT64      *F64;
 498
 499   switch ((*Reloc) >> 12) {
 500
 501     case EFI_IMAGE_REL_BASED_DIR64:
 502       F64 = (UINT64 *) Fixup;
 503       *F64 = *F64 + (UINT64) Adjust;
 504       if (*FixupData != NULL) {
 505         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 506         *(UINT64 *)(*FixupData) = *F64;
 507         *FixupData = *FixupData + sizeof(UINT64);
 508       }
 509       break;
 510
 511     default:
 512       return RETURN_UNSUPPORTED;
 513   }
 514
 515   return RETURN_SUCCESS;
 516 }