BaseTools/UserManuals/GenVtf_Utility_Man_Page.rtf

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  11 \s2\ql \li0\ri0\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\f42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 \sbasedon0 \snext0 heading 2;}{\*\cs10
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  21 {\pntxta \hich )}}{\*\pnseclvl9\pnlcrm\pnstart1\pnindent720\pnhang {\pntxtb \hich (}{\pntxta \hich )}}\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0
  22 \keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28
  23 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Name
  24 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  25 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf.exe - generate the Boot Strap File (AKA Volume Top File, or VTF) for IPF images
  26 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  27 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Synopsis
  28 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs18
  29 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf.exe [options]}{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\lang1036\langfe2052\langnp1036\insrsid5839829
  30 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  31 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Description
  32 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  33 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42
  34 GenVtf is used to generate the Boot Strap File (AKA Volume Top File, or VTF) for IPF images. This utility will parse the input BSF inf file and get the component information. If all the components which are required to put into a single VTF file, then onl
  35 \hich\af42\dbch\af13\loch\f42 y\hich\af42\dbch\af13\loch\f42  one VTF Base Address and Size will be needed and only one raw data output file and one symbol output file which is the symbol of raw data. If there\hich\f42 \rquote \loch\f42
  36 s component which is required to put into the second VTF file but there\hich\f42 \rquote \loch\f42 s no second VTF Base Address and S\hich\af42\dbch\af13\loch\f42 i\hich\af42\dbch\af13\loch\f42
  37 ze specified in command line interface, then this utility will exit with related error message; if there\hich\f42 \rquote \loch\f42 s second VTF Base Address and Size specified, then there are two raw data output files and one symbol output file.
  38 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  39 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Options}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  40 \b\fs28\cf18\insrsid5839829
  41 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs18
  42 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -f, --filename BS_INFFile
  43 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42   \hich\af42\dbch\af13\loch\f42     Name of the BS Image INF file to use
  44 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -r, --baseaddr hexaddress
  45 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42       The Base Address is the starting address of the Firmware Volume where the Boot Strapped Image will reside
  46 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -s, --size Size
  47 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42       The size of the Firmware Volume
  48 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42  -o, --output Filename
  49 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42       VTF Filename that will be created
  50 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 --version
  51 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \tab \hich\af42\dbch\af13\loch\f42 Print version and copyright of this program and exit
  52 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -v, --verbose
  53 \par }\pard \ltrpar\ql \li360\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin360\itap0 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42
  54 Turn on verbose output with informational messages printed. This is a count value, so specifying \hich\f42 \endash \loch\f42 vv can be used to increase the verbosity\hich\af42\dbch\af13\loch\f42  level.
  55 \par }\pard \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 {\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -q, --quiet
  56 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \tab \hich\af42\dbch\af13\loch\f42 Disable all messages except FATAL ERRORS
  57 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -d, --debug [#]
  58 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \tab \hich\af42\dbch\af13\loch\f42 Enable debug messages, at level #
  59 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 -h, --help
  60 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \tab \hich\af42\dbch\af13\loch\f42 Print copyright, version and usage of this program and exit
  61 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  62 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Example}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  63 \b\fs28\cf18\insrsid5839829
  64 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  65 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 \hich\f42 Generate one VTF file with inf file name, base address and size specified in command line and without output filename specified. So default filename \'93\loch\f42 \hich\f42 VTF1.RAW\'94
  66 \loch\f42  will be used.
  67 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf \hich\f42 \endash \loch\f42 f bsf.inf \hich\f42 \endash \loch\f42 r 0xFFE00000 \hich\f42 \endash \loch\f42 s 0x200000
  68 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 Generate two VTF files with inf file n\hich\af42\dbch\af13\loch\f42 \hich\f42
  69 ame, base address and size specified in command line and without output filename specified. So default filename \'93\loch\f42 \hich\f42 VTF1.RAW\'94\loch\f42 \hich\f42  and \'93\loch\f42 \hich\f42 VTF2.RAW\'94\loch\f42 will be used.
  70 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf \hich\f42 \endash \loch\f42 f bsf.inf \hich\f42 \endash \loch\f42 r 0xFFE00000 \hich\f42 \endash \loch\f42 s 0x200000 \hich\f42 \endash \loch\f42
  71 r 0xFFD00000 \hich\f42 \endash \loch\f42 s 0x100000
  72 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 Generate one VTF file with inf file\hich\af42\dbch\af13\loch\f42  name, base address and size specified in command line and output filename specified.
  73 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf \hich\f42 \endash \loch\f42 o file.tmp \hich\f42 \endash \loch\f42 f bsf.inf \hich\f42 \endash \loch\f42 r 0xFFE00000 \hich\f42 \endash \loch\f42
  74 s 0x200000
  75 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 Generate two VTF files with inf file name, base address and size specified in command line and output filename spe\hich\af42\dbch\af13\loch\f42 cified.
  76 \par }{\rtlch\fcs1 \ab\af42\afs18 \ltrch\fcs0 \b\fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 GenVtf \hich\f42 \endash \loch\f42 o file1.tmp \hich\f42 \endash \loch\f42 o file2.tmp \hich\f42 \endash \loch\f42 f bsf.inf \hich\f42 \endash \loch\f42
  77 r 0xFFE00000 \hich\f42 \endash \loch\f42 s 0x200000 \hich\f42 \endash \loch\f42 r 0xFFD00000 \hich\f42 \endash \loch\f42 s 0x100000
  78 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  79 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Bugs}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  80 \b\fs28\cf18\insrsid5839829
  81 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  82 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 No known bugs.
  83 \par \hich\af42\dbch\af13\loch\f42 Report bugs to issues@buildtools.tianocore.org
  84 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  85 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 Files}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  86 \b\fs28\cf18\insrsid5839829
  87 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  88 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 None
  89 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  90 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 See}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  91 \b\fs28\cf18\insrsid5839829 \hich\af42\dbch\af13\loch\f42  }{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid15806093 \hich\af42\dbch\af13\loch\f42 also}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf18\insrsid5839829
  92 \par }\pard\plain \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0
  93 \fs18\cf1\insrsid5839829 \hich\af42\dbch\af13\loch\f42 None
  94 \par }\pard\plain \ltrpar\s2\ql \li-1440\ri0\sb400\sa60\sl-340\slmult0\keep\keepn\nowidctlpar\wrapdefault\faauto\outlinelevel1\rin0\lin-1440\itap0\pararsid4810562 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0
  95 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0 \b\fs28\cf17\insrsid5839829\charrsid4810562 \hich\af42\dbch\af13\loch\f42 License}{\rtlch\fcs1 \ab\af42\afs28 \ltrch\fcs0
  96 \b\fs28\cf18\insrsid5839829
  97 \par }\pard\plain \ltrpar\ql \li0\ri0\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0\pararsid4946234 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe2052\loch\af42\hich\af42\dbch\af13\cgrid\langnp1033\langfenp2052 {\rtlch\fcs1 \af42\afs18
  98 \ltrch\fcs0 \fs18\cf1\insrsid4946234 \hich\af42\dbch\af13\loch\f42 Copyright (c) }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid4946234 \hich\af42\dbch\af13\loch\f42 1999}{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid4946234
  99 \hich\af42\dbch\af13\loch\f42  - 2009, Intel Corporation<\hich\af42\dbch\af13\loch\f42 BR>
 100 \par \hich\af42\dbch\af13\loch\f42 All rights reserved. This program and the accompanying materials
 101 \par \hich\af42\dbch\af13\loch\f42 are licensed and made available under the terms and conditions of the BSD License
 102 \par \hich\af42\dbch\af13\loch\f42 which accompanies this distribution.  The full text of the license may be found at
 103 \par \hich\af42\dbch\af13\loch\f42 http://opensource.org/\hich\af42\dbch\af13\loch\f42 licenses/bsd-license.php}{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid4946234 \tab
 104 \par }{\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid4946234
 105 \par \hich\af42\dbch\af13\loch\f42 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 106 \par \hich\af42\dbch\af13\loch\f42 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 107 \par }\pard \ltrpar\ql \li0\ri0\sb200\nowidctlpar\wrapdefault\faauto\rin0\lin0\itap0 {\rtlch\fcs1 \af42\afs18 \ltrch\fcs0 \fs18\cf1\insrsid5839829
 108 \par }}