BeagleBoardPkg/Sec/Clock.c

   1 /** @file
   2
   3   Copyright (c) 2008-2009, Apple Inc. All rights reserved.
   4
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <Library/IoLib.h>
  16 #include <Library/DebugLib.h>
  17
  18 #include <Omap3530/Omap3530.h>
  19
  20 VOID
  21 ClockInit (
  22   VOID
  23   )
  24 {
  25   //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
  26
  27   // Enable PLL5 and set to 120 MHz as a reference clock.
  28   MmioWrite32(CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
  29   MmioWrite32(CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
  30   MmioWrite32(CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
  31
  32   // Turn on functional & interface clocks to the USBHOST power domain
  33   MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
  34                               | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
  35   MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
  36
  37   // Turn on functional & interface clocks to the USBTLL block.
  38   MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
  39   MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
  40
  41   // Turn on functional & interface clocks to MMC1 and I2C1 modules.
  42   MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
  43                             | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
  44   MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
  45                             | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
  46
  47   // Turn on functional & interface clocks to various Peripherals.
  48   MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
  49                           | CM_FCLKEN_PER_EN_GPT3_ENABLE
  50                           | CM_FCLKEN_PER_EN_GPT4_ENABLE
  51                           | CM_FCLKEN_PER_EN_GPIO2_ENABLE
  52                           | CM_FCLKEN_PER_EN_GPIO3_ENABLE
  53                           | CM_FCLKEN_PER_EN_GPIO4_ENABLE
  54                           | CM_FCLKEN_PER_EN_GPIO5_ENABLE
  55                           | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
  56   MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
  57                           | CM_ICLKEN_PER_EN_GPT3_ENABLE
  58                           | CM_ICLKEN_PER_EN_GPT4_ENABLE
  59                           | CM_ICLKEN_PER_EN_GPIO2_ENABLE
  60                           | CM_ICLKEN_PER_EN_GPIO3_ENABLE
  61                           | CM_ICLKEN_PER_EN_GPIO4_ENABLE
  62                           | CM_ICLKEN_PER_EN_GPIO5_ENABLE
  63                           | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
  64
  65   // Turn on functional & inteface clocks to various wakeup modules.
  66   MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
  67                            | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
  68   MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
  69                            | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
  70 }