]> git.proxmox.com Git - mirror_edk2.git/blob - CorebootModulePkg/CbSupportPei/CbSupportPei.c
CorebootModulePkg: Add a library to parse platform specific info.
[mirror_edk2.git] / CorebootModulePkg / CbSupportPei / CbSupportPei.c
1 /** @file
2 This PEIM will parse coreboot table in memory and report resource information into pei core.
3 This file contains the main entrypoint of the PEIM.
4
5 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15 #include "CbSupportPei.h"
16
17 #define LEGACY_8259_MASK_REGISTER_MASTER 0x21
18 #define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
19
20 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
21 { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) },
22 { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },
23 { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) },
24 { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) },
25 { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) },
26 { EfiMaxMemoryType, 0 }
27 };
28
29 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
30 {
31 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
32 &gEfiPeiMasterBootModePpiGuid,
33 NULL
34 }
35 };
36
37 /**
38 Create memory mapped io resource hob.
39
40 @param MmioBase Base address of the memory mapped io range
41 @param MmioSize Length of the memory mapped io range
42
43 **/
44 VOID
45 BuildMemoryMappedIoRangeHob (
46 EFI_PHYSICAL_ADDRESS MmioBase,
47 UINT64 MmioSize
48 )
49 {
50 BuildResourceDescriptorHob (
51 EFI_RESOURCE_MEMORY_MAPPED_IO,
52 (EFI_RESOURCE_ATTRIBUTE_PRESENT |
53 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
54 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
55 EFI_RESOURCE_ATTRIBUTE_TESTED),
56 MmioBase,
57 MmioSize
58 );
59
60 BuildMemoryAllocationHob (
61 MmioBase,
62 MmioSize,
63 EfiMemoryMappedIO
64 );
65 }
66
67 /**
68 Check the integrity of firmware volume header
69
70 @param[in] FwVolHeader A pointer to a firmware volume header
71
72 @retval TRUE The firmware volume is consistent
73 @retval FALSE The firmware volume has corrupted.
74
75 **/
76 STATIC
77 BOOLEAN
78 IsFvHeaderValid (
79 IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
80 )
81 {
82 UINT16 Checksum;
83
84 // Skip nv storage fv
85 if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
86 return FALSE;
87 }
88
89 if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
90 (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
91 (FwVolHeader->FvLength == ((UINTN) -1)) ||
92 ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
93 return FALSE;
94 }
95
96 Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
97 if (Checksum != 0) {
98 DEBUG (( DEBUG_ERROR,
99 "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
100 FwVolHeader->Checksum,
101 (UINT16)( Checksum + FwVolHeader->Checksum )));
102 return FALSE;
103 }
104
105 return TRUE;
106 }
107
108 /**
109 Install FvInfo PPI and create fv hobs for remained fvs
110
111 **/
112 VOID
113 CbPeiReportRemainedFvs (
114 VOID
115 )
116 {
117 UINT8* TempPtr;
118 UINT8* EndPtr;
119
120 TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
121 EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
122
123 for (;TempPtr < EndPtr;) {
124 if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
125 if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {
126 // Skip the PEI FV
127 DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
128
129 PeiServicesInstallFvInfoPpi (
130 NULL,
131 (VOID *) (UINTN) TempPtr,
132 (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
133 NULL,
134 NULL
135 );
136 BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
137 }
138 }
139 TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
140 }
141 }
142
143 /**
144 This is the entrypoint of PEIM
145
146 @param FileHandle Handle of the file being invoked.
147 @param PeiServices Describes the list of possible PEI Services.
148
149 @retval EFI_SUCCESS if it completed successfully.
150 **/
151 EFI_STATUS
152 EFIAPI
153 CbPeiEntryPoint (
154 IN EFI_PEI_FILE_HANDLE FileHandle,
155 IN CONST EFI_PEI_SERVICES **PeiServices
156 )
157 {
158 EFI_STATUS Status;
159 UINT64 LowMemorySize, HighMemorySize;
160 UINT64 PeiMemSize = SIZE_64MB; // 64 MB
161 EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
162 UINT32 RegEax;
163 UINT8 PhysicalAddressBits;
164 VOID* pCbHeader;
165 VOID* pAcpiTable;
166 UINT32 AcpiTableSize;
167 VOID* pSmbiosTable;
168 UINT32 SmbiosTableSize;
169 SYSTEM_TABLE_INFO* pSystemTableInfo;
170 FRAME_BUFFER_INFO FbInfo;
171 FRAME_BUFFER_INFO* pFbInfo;
172 ACPI_BOARD_INFO* pAcpiBoardInfo;
173 UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
174 UINTN PmEvtBase;
175 UINTN PmGpeEnBase;
176
177 LowMemorySize = 0;
178 HighMemorySize = 0;
179
180 Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);
181 if (EFI_ERROR(Status))
182 return Status;
183
184 DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%lx.\n", LowMemorySize));
185 DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%lx.\n", HighMemorySize));
186
187 ASSERT (LowMemorySize > 0);
188
189 //
190 // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED
191 // is intentionally omitted to prevent erasing of the coreboot header
192 // record before it is processed by CbParseMemoryInfo.
193 //
194 BuildResourceDescriptorHob (
195 EFI_RESOURCE_SYSTEM_MEMORY,
196 (
197 EFI_RESOURCE_ATTRIBUTE_PRESENT |
198 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
199 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
200 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
201 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
202 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
203 ),
204 (EFI_PHYSICAL_ADDRESS)(0),
205 (UINT64)(0xA0000)
206 );
207
208
209 BuildResourceDescriptorHob (
210 EFI_RESOURCE_MEMORY_RESERVED,
211 (
212 EFI_RESOURCE_ATTRIBUTE_PRESENT |
213 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
214 EFI_RESOURCE_ATTRIBUTE_TESTED |
215 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
216 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
217 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
218 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
219 ),
220 (EFI_PHYSICAL_ADDRESS)(0xA0000),
221 (UINT64)(0x60000)
222 );
223
224 BuildResourceDescriptorHob (
225 EFI_RESOURCE_SYSTEM_MEMORY,
226 (
227 EFI_RESOURCE_ATTRIBUTE_PRESENT |
228 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
229 EFI_RESOURCE_ATTRIBUTE_TESTED |
230 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
231 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
232 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
233 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
234 ),
235 (EFI_PHYSICAL_ADDRESS)(0x100000),
236 (UINT64) (LowMemorySize - 0x100000)
237 );
238
239 if (HighMemorySize > 0) {
240 BuildResourceDescriptorHob (
241 EFI_RESOURCE_SYSTEM_MEMORY,
242 (
243 EFI_RESOURCE_ATTRIBUTE_PRESENT |
244 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
245 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
246 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
247 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
248 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
249 ),
250 (EFI_PHYSICAL_ADDRESS)(0x100000000ULL),
251 HighMemorySize
252 );
253 }
254
255 //
256 // Should be 64k aligned
257 //
258 PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
259
260 DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
261 DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
262
263 Status = PeiServicesInstallPeiMemory (
264 PeiMemBase,
265 PeiMemSize
266 );
267 ASSERT_EFI_ERROR (Status);
268
269 //
270 // Set cache on the physical memory
271 //
272 MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
273 MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
274
275 //
276 // Create Memory Type Information HOB
277 //
278 BuildGuidDataHob (
279 &gEfiMemoryTypeInformationGuid,
280 mDefaultMemoryTypeInformation,
281 sizeof(mDefaultMemoryTypeInformation)
282 );
283
284 //
285 // Create Fv hob
286 //
287 CbPeiReportRemainedFvs ();
288
289 BuildMemoryAllocationHob (
290 PcdGet32 (PcdPayloadFdMemBase),
291 PcdGet32 (PcdPayloadFdMemSize),
292 EfiBootServicesData
293 );
294
295 //
296 // Build CPU memory space and IO space hob
297 //
298 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
299 if (RegEax >= 0x80000008) {
300 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
301 PhysicalAddressBits = (UINT8) RegEax;
302 } else {
303 PhysicalAddressBits = 36;
304 }
305 //
306 // Create a CPU hand-off information
307 //
308 BuildCpuHob (PhysicalAddressBits, 16);
309
310 //
311 // Report Local APIC range
312 //
313 BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
314
315 //
316 // Boot mode
317 //
318 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
319 ASSERT_EFI_ERROR (Status);
320
321 Status = PeiServicesInstallPpi (mPpiBootMode);
322 ASSERT_EFI_ERROR (Status);
323
324 //
325 // Set pcd to save the upper coreboot header in case the dxecore will
326 // erase 0~4k memory
327 //
328 pCbHeader = NULL;
329 if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
330 && ((UINTN)pCbHeader > BASE_4KB)) {
331 DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
332 Status = PcdSet32S (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
333 ASSERT_EFI_ERROR (Status);
334 }
335
336 //
337 // Create guid hob for system tables like acpi table and smbios table
338 //
339 pAcpiTable = NULL;
340 AcpiTableSize = 0;
341 pSmbiosTable = NULL;
342 SmbiosTableSize = 0;
343 Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
344 if (EFI_ERROR (Status)) {
345 // ACPI table is oblidgible
346 DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
347 ASSERT (FALSE);
348 }
349 CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
350
351 pSystemTableInfo = NULL;
352 pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
353 ASSERT (pSystemTableInfo != NULL);
354 pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
355 pSystemTableInfo->AcpiTableSize = AcpiTableSize;
356 pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
357 pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
358 DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
359 DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
360 DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
361
362 //
363 // Create guid hob for acpi board information
364 //
365 Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue, &PmEvtBase, &PmGpeEnBase);
366 ASSERT_EFI_ERROR (Status);
367 pAcpiBoardInfo = NULL;
368 pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
369 ASSERT (pAcpiBoardInfo != NULL);
370 pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
371 pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
372 pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
373 pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
374 pAcpiBoardInfo->PmEvtBase = (UINT64)PmEvtBase;
375 pAcpiBoardInfo->PmGpeEnBase = (UINT64)PmGpeEnBase;
376 DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
377
378 //
379 // Create guid hob for frame buffer information
380 //
381 ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
382 Status = CbParseFbInfo (&FbInfo);
383 if (!EFI_ERROR (Status)) {
384 pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
385 ASSERT (pSystemTableInfo != NULL);
386 CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
387 DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
388 }
389
390 //
391 // Parse platform specific information from coreboot.
392 //
393 Status = CbParsePlatformInfo ();
394 if (EFI_ERROR (Status)) {
395 DEBUG ((EFI_D_ERROR, "Error when parsing platform info, Status = %r\n", Status));
396 return Status;
397 }
398
399 //
400 // Mask off all legacy 8259 interrupt sources
401 //
402 IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
403 IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
404
405 return EFI_SUCCESS;
406 }
407