]> git.proxmox.com Git - mirror_edk2.git/blob - CorebootModulePkg/Include/Coreboot.h
CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters
[mirror_edk2.git] / CorebootModulePkg / Include / Coreboot.h
1 /** @file
2 Coreboot PEI module include file.
3
4 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 /*
16 * This file is part of the libpayload project.
17 *
18 * Copyright (C) 2008 Advanced Micro Devices, Inc.
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. The name of the author may not be used to endorse or promote products
29 * derived from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * SUCH DAMAGE.
42 */
43
44
45 #ifndef _COREBOOT_PEI_H_INCLUDED_
46 #define _COREBOOT_PEI_H_INCLUDED_
47
48 #if defined(_MSC_VER)
49 #pragma warning( disable : 4200 )
50 #endif
51
52 #define DYN_CBMEM_ALIGN_SIZE (4096)
53
54 #define IMD_ENTRY_MAGIC (~0xC0389481)
55 #define CBMEM_ENTRY_MAGIC (~0xC0389479)
56
57 struct cbmem_entry {
58 UINT32 magic;
59 UINT32 start;
60 UINT32 size;
61 UINT32 id;
62 };
63
64 struct cbmem_root {
65 UINT32 max_entries;
66 UINT32 num_entries;
67 UINT32 locked;
68 UINT32 size;
69 struct cbmem_entry entries[0];
70 };
71
72 struct imd_entry {
73 UINT32 magic;
74 UINT32 start_offset;
75 UINT32 size;
76 UINT32 id;
77 };
78
79 struct imd_root {
80 UINT32 max_entries;
81 UINT32 num_entries;
82 UINT32 flags;
83 UINT32 entry_align;
84 UINT32 max_offset;
85 struct imd_entry entries[0];
86 };
87
88 struct cbuint64 {
89 UINT32 lo;
90 UINT32 hi;
91 };
92
93 #define CB_HEADER_SIGNATURE 0x4F49424C
94
95 struct cb_header {
96 UINT32 signature;
97 UINT32 header_bytes;
98 UINT32 header_checksum;
99 UINT32 table_bytes;
100 UINT32 table_checksum;
101 UINT32 table_entries;
102 };
103
104 struct cb_record {
105 UINT32 tag;
106 UINT32 size;
107 };
108
109 #define CB_TAG_UNUSED 0x0000
110 #define CB_TAG_MEMORY 0x0001
111
112 struct cb_memory_range {
113 struct cbuint64 start;
114 struct cbuint64 size;
115 UINT32 type;
116 };
117
118 #define CB_MEM_RAM 1
119 #define CB_MEM_RESERVED 2
120 #define CB_MEM_ACPI 3
121 #define CB_MEM_NVS 4
122 #define CB_MEM_UNUSABLE 5
123 #define CB_MEM_VENDOR_RSVD 6
124 #define CB_MEM_TABLE 16
125
126 struct cb_memory {
127 UINT32 tag;
128 UINT32 size;
129 struct cb_memory_range map[0];
130 };
131
132 #define CB_TAG_MAINBOARD 0x0003
133
134 struct cb_mainboard {
135 UINT32 tag;
136 UINT32 size;
137 UINT8 vendor_idx;
138 UINT8 part_number_idx;
139 UINT8 strings[0];
140 };
141 #define CB_TAG_VERSION 0x0004
142 #define CB_TAG_EXTRA_VERSION 0x0005
143 #define CB_TAG_BUILD 0x0006
144 #define CB_TAG_COMPILE_TIME 0x0007
145 #define CB_TAG_COMPILE_BY 0x0008
146 #define CB_TAG_COMPILE_HOST 0x0009
147 #define CB_TAG_COMPILE_DOMAIN 0x000a
148 #define CB_TAG_COMPILER 0x000b
149 #define CB_TAG_LINKER 0x000c
150 #define CB_TAG_ASSEMBLER 0x000d
151
152 struct cb_string {
153 UINT32 tag;
154 UINT32 size;
155 UINT8 string[0];
156 };
157
158 #define CB_TAG_SERIAL 0x000f
159
160 struct cb_serial {
161 UINT32 tag;
162 UINT32 size;
163 #define CB_SERIAL_TYPE_IO_MAPPED 1
164 #define CB_SERIAL_TYPE_MEMORY_MAPPED 2
165 UINT32 type;
166 UINT32 baseaddr;
167 UINT32 baud;
168 UINT32 regwidth;
169
170 // Crystal or input frequency to the chip containing the UART.
171 // Provide the board specific details to allow the payload to
172 // initialize the chip containing the UART and make independent
173 // decisions as to which dividers to select and their values
174 // to eventually arrive at the desired console baud-rate.
175 UINT32 input_hertz;
176
177 // UART PCI address: bus, device, function
178 // 1 << 31 - Valid bit, PCI UART in use
179 // Bus << 20
180 // Device << 15
181 // Function << 12
182 UINT32 uart_pci_addr;
183 };
184
185 #define CB_TAG_CONSOLE 0x00010
186
187 struct cb_console {
188 UINT32 tag;
189 UINT32 size;
190 UINT16 type;
191 };
192
193 #define CB_TAG_CONSOLE_SERIAL8250 0
194 #define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
195 #define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
196 #define CB_TAG_CONSOLE_LOGBUF 3
197 #define CB_TAG_CONSOLE_SROM 4 // OBSOLETE
198 #define CB_TAG_CONSOLE_EHCI 5
199
200 #define CB_TAG_FORWARD 0x00011
201
202 struct cb_forward {
203 UINT32 tag;
204 UINT32 size;
205 UINT64 forward;
206 };
207
208 #define CB_TAG_FRAMEBUFFER 0x0012
209 struct cb_framebuffer {
210 UINT32 tag;
211 UINT32 size;
212
213 UINT64 physical_address;
214 UINT32 x_resolution;
215 UINT32 y_resolution;
216 UINT32 bytes_per_line;
217 UINT8 bits_per_pixel;
218 UINT8 red_mask_pos;
219 UINT8 red_mask_size;
220 UINT8 green_mask_pos;
221 UINT8 green_mask_size;
222 UINT8 blue_mask_pos;
223 UINT8 blue_mask_size;
224 UINT8 reserved_mask_pos;
225 UINT8 reserved_mask_size;
226 };
227
228 #define CB_TAG_VDAT 0x0015
229 struct cb_vdat {
230 UINT32 tag;
231 UINT32 size; /* size of the entire entry */
232 UINT64 vdat_addr;
233 UINT32 vdat_size;
234 };
235
236 #define CB_TAG_TIMESTAMPS 0x0016
237 #define CB_TAG_CBMEM_CONSOLE 0x0017
238 #define CB_TAG_MRC_CACHE 0x0018
239 struct cb_cbmem_tab {
240 UINT32 tag;
241 UINT32 size;
242 UINT64 cbmem_tab;
243 };
244
245 /* Helpful macros */
246
247 #define MEM_RANGE_COUNT(_rec) \
248 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
249
250 #define MEM_RANGE_PTR(_rec, _idx) \
251 (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
252 + (sizeof((_rec)->map[0]) * (_idx)))
253
254
255 #endif // _COREBOOT_PEI_H_INCLUDED_