]>
git.proxmox.com Git - mirror_edk2.git/blob - CorebootModulePkg/Include/Coreboot.h
2 Coreboot PEI module include file.
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 * This file is part of the libpayload project.
18 * Copyright (C) 2008 Advanced Micro Devices, Inc.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. The name of the author may not be used to endorse or promote products
29 * derived from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
45 #ifndef _COREBOOT_PEI_H_INCLUDED_
46 #define _COREBOOT_PEI_H_INCLUDED_
48 #pragma warning( disable : 4200 )
50 #define DYN_CBMEM_ALIGN_SIZE (4096)
64 struct cbmem_entry entries
[0];
72 #define CB_HEADER_SIGNATURE 0x4F49424C
77 UINT32 header_checksum
;
79 UINT32 table_checksum
;
88 #define CB_TAG_UNUSED 0x0000
89 #define CB_TAG_MEMORY 0x0001
91 struct cb_memory_range
{
92 struct cbuint64 start
;
98 #define CB_MEM_RESERVED 2
101 #define CB_MEM_UNUSABLE 5
102 #define CB_MEM_VENDOR_RSVD 6
103 #define CB_MEM_TABLE 16
108 struct cb_memory_range map
[0];
111 #define CB_TAG_MAINBOARD 0x0003
113 struct cb_mainboard
{
117 UINT8 part_number_idx
;
120 #define CB_TAG_VERSION 0x0004
121 #define CB_TAG_EXTRA_VERSION 0x0005
122 #define CB_TAG_BUILD 0x0006
123 #define CB_TAG_COMPILE_TIME 0x0007
124 #define CB_TAG_COMPILE_BY 0x0008
125 #define CB_TAG_COMPILE_HOST 0x0009
126 #define CB_TAG_COMPILE_DOMAIN 0x000a
127 #define CB_TAG_COMPILER 0x000b
128 #define CB_TAG_LINKER 0x000c
129 #define CB_TAG_ASSEMBLER 0x000d
137 #define CB_TAG_SERIAL 0x000f
142 #define CB_SERIAL_TYPE_IO_MAPPED 1
143 #define CB_SERIAL_TYPE_MEMORY_MAPPED 2
149 #define CB_TAG_CONSOLE 0x00010
157 #define CB_TAG_CONSOLE_SERIAL8250 0
158 #define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
159 #define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
160 #define CB_TAG_CONSOLE_LOGBUF 3
161 #define CB_TAG_CONSOLE_SROM 4 // OBSOLETE
162 #define CB_TAG_CONSOLE_EHCI 5
164 #define CB_TAG_FORWARD 0x00011
172 #define CB_TAG_FRAMEBUFFER 0x0012
173 struct cb_framebuffer
{
177 UINT64 physical_address
;
180 UINT32 bytes_per_line
;
181 UINT8 bits_per_pixel
;
184 UINT8 green_mask_pos
;
185 UINT8 green_mask_size
;
187 UINT8 blue_mask_size
;
188 UINT8 reserved_mask_pos
;
189 UINT8 reserved_mask_size
;
192 #define CB_TAG_VDAT 0x0015
195 UINT32 size
; /* size of the entire entry */
200 #define CB_TAG_TIMESTAMPS 0x0016
201 #define CB_TAG_CBMEM_CONSOLE 0x0017
202 #define CB_TAG_MRC_CACHE 0x0018
203 struct cb_cbmem_tab
{
211 #define MEM_RANGE_COUNT(_rec) \
212 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
214 #define MEM_RANGE_PTR(_rec, _idx) \
215 (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
216 + (sizeof((_rec)->map[0]) * (_idx)))
219 #endif // _COREBOOT_PEI_H_INCLUDED_