]> git.proxmox.com Git - mirror_edk2.git/blob - DuetPkg/CpuDxe/Ia32/CpuInterrupt.asm
cc1402cd9b42c38ceac1b7dbaede6f243806875a
[mirror_edk2.git] / DuetPkg / CpuDxe / Ia32 / CpuInterrupt.asm
1 TITLE CpuInterrupt.asm:
2 ;------------------------------------------------------------------------------
3 ;*
4 ;* Copyright 2006, Intel Corporation
5 ;* All rights reserved. This program and the accompanying materials
6 ;* are licensed and made available under the terms and conditions of the BSD License
7 ;* which accompanies this distribution. The full text of the license may be found at
8 ;* http://opensource.org/licenses/bsd-license.php
9 ;*
10 ;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 ;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 ;*
13 ;* CpuInterrupt.asm
14 ;*
15 ;* Abstract:
16 ;*
17 ;------------------------------------------------------------------------------
18
19 .686p
20 .model flat, C
21
22 PUBLIC SystemTimerHandler
23 PUBLIC SystemExceptionHandler
24 EXTERNDEF mExceptionCodeSize:DWORD
25
26 .code
27 .stack
28 .MMX
29 .XMM
30
31 EXTERN TimerHandler: NEAR
32 EXTERN ExceptionHandler: NEAR
33 EXTERN mTimerVector: DWORD
34
35 mExceptionCodeSize DD 9
36
37 InitDescriptor PROC C
38 lea eax, [GDT_BASE] ; EAX=PHYSICAL address of gdt
39 mov dword ptr [gdtr + 2],eax ; Put address of gdt into the gdtr
40 lgdt fword ptr [gdtr]
41 lea eax, [IDT_BASE] ; EAX=PHYSICAL address of idt
42 mov dword ptr [idtr + 2],eax ; Put address of idt into the idtr
43 lidt fword ptr [idtr]
44 ret
45 InitDescriptor ENDP
46
47 ; VOID
48 ; InstallInterruptHandler (
49 ; UINTN Vector,
50 ; VOID (*Handler)(VOID)
51 ; )
52 InstallInterruptHandler PROC C \
53 Vector:DWORD, \
54 Handler:DWORD
55
56 push edi
57 pushfd ; save eflags
58 cli ; turn off interrupts
59 sub esp, 6 ; open some space on the stack
60 mov edi, esp
61 sidt es:[edi] ; get fword address of IDT
62 mov edi, es:[edi+2] ; move offset of IDT into EDI
63 add esp, 6 ; correct stack
64 mov eax, Vector ; Get vector number
65 shl eax, 3 ; multiply by 8 to get offset
66 add edi, eax ; add to IDT base to get entry
67 mov eax, Handler ; load new address into IDT entry
68 mov word ptr es:[edi], ax ; write bits 15..0 of offset
69 shr eax, 16 ; use ax to copy 31..16 to descriptors
70 mov word ptr es:[edi+6], ax ; write bits 31..16 of offset
71 popfd ; restore flags (possible enabling interrupts)
72 pop edi
73 ret
74
75 InstallInterruptHandler ENDP
76
77 JmpCommonIdtEntry macro
78 ; jmp commonIdtEntry - this must be hand coded to keep the assembler from
79 ; using a 8 bit reletive jump when the entries are
80 ; within 255 bytes of the common entry. This must
81 ; be done to maintain the consistency of the size
82 ; of entry points...
83 db 0e9h ; jmp 16 bit reletive
84 dd commonIdtEntry - $ - 4 ; offset to jump to
85 endm
86
87 align 02h
88 SystemExceptionHandler PROC
89 INT0:
90 push 0h ; push error code place holder on the stack
91 push 0h
92 JmpCommonIdtEntry
93 ; db 0e9h ; jmp 16 bit reletive
94 ; dd commonIdtEntry - $ - 4 ; offset to jump to
95
96 INT1:
97 push 0h ; push error code place holder on the stack
98 push 1h
99 JmpCommonIdtEntry
100
101 INT2:
102 push 0h ; push error code place holder on the stack
103 push 2h
104 JmpCommonIdtEntry
105
106 INT3:
107 push 0h ; push error code place holder on the stack
108 push 3h
109 JmpCommonIdtEntry
110
111 INT4:
112 push 0h ; push error code place holder on the stack
113 push 4h
114 JmpCommonIdtEntry
115
116 INT5:
117 push 0h ; push error code place holder on the stack
118 push 5h
119 JmpCommonIdtEntry
120
121 INT6:
122 push 0h ; push error code place holder on the stack
123 push 6h
124 JmpCommonIdtEntry
125
126 INT7:
127 push 0h ; push error code place holder on the stack
128 push 7h
129 JmpCommonIdtEntry
130
131 INT8:
132 ; Double fault causes an error code to be pushed so no phony push necessary
133 nop
134 nop
135 push 8h
136 JmpCommonIdtEntry
137
138 INT9:
139 push 0h ; push error code place holder on the stack
140 push 9h
141 JmpCommonIdtEntry
142
143 INT10:
144 ; Invalid TSS causes an error code to be pushed so no phony push necessary
145 nop
146 nop
147 push 10
148 JmpCommonIdtEntry
149
150 INT11:
151 ; Segment Not Present causes an error code to be pushed so no phony push necessary
152 nop
153 nop
154 push 11
155 JmpCommonIdtEntry
156
157 INT12:
158 ; Stack fault causes an error code to be pushed so no phony push necessary
159 nop
160 nop
161 push 12
162 JmpCommonIdtEntry
163
164 INT13:
165 ; GP fault causes an error code to be pushed so no phony push necessary
166 nop
167 nop
168 push 13
169 JmpCommonIdtEntry
170
171 INT14:
172 ; Page fault causes an error code to be pushed so no phony push necessary
173 nop
174 nop
175 push 14
176 JmpCommonIdtEntry
177
178 INT15:
179 push 0h ; push error code place holder on the stack
180 push 15
181 JmpCommonIdtEntry
182
183 INT16:
184 push 0h ; push error code place holder on the stack
185 push 16
186 JmpCommonIdtEntry
187
188 INT17:
189 ; Alignment check causes an error code to be pushed so no phony push necessary
190 nop
191 nop
192 push 17
193 JmpCommonIdtEntry
194
195 INT18:
196 push 0h ; push error code place holder on the stack
197 push 18
198 JmpCommonIdtEntry
199
200 INT19:
201 push 0h ; push error code place holder on the stack
202 push 19
203 JmpCommonIdtEntry
204
205 INTUnknown:
206 REPEAT (32 - 20)
207 push 0h ; push error code place holder on the stack
208 ; push xxh ; push vector number
209 db 06ah
210 db ( $ - INTUnknown - 3 ) / 9 + 20 ; vector number
211 JmpCommonIdtEntry
212 ENDM
213 SystemExceptionHandler ENDP
214
215 SystemTimerHandler PROC
216 push 0
217 push mTimerVector
218 JmpCommonIdtEntry
219 SystemTimerHandler ENDP
220
221 commonIdtEntry:
222 ; +---------------------+
223 ; + EFlags +
224 ; +---------------------+
225 ; + CS +
226 ; +---------------------+
227 ; + EIP +
228 ; +---------------------+
229 ; + Error Code +
230 ; +---------------------+
231 ; + Vector Number +
232 ; +---------------------+
233 ; + EBP +
234 ; +---------------------+ <-- EBP
235
236 cli
237 push ebp
238 mov ebp, esp
239
240 ;
241 ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
242 ; is 16-byte aligned
243 ;
244 and esp, 0fffffff0h
245 sub esp, 12
246
247 ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
248 push eax
249 push ecx
250 push edx
251 push ebx
252 lea ecx, [ebp + 6 * 4]
253 push ecx ; ESP
254 push dword ptr [ebp] ; EBP
255 push esi
256 push edi
257
258 ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
259 mov eax, ss
260 push eax
261 movzx eax, word ptr [ebp + 4 * 4]
262 push eax
263 mov eax, ds
264 push eax
265 mov eax, es
266 push eax
267 mov eax, fs
268 push eax
269 mov eax, gs
270 push eax
271
272 ;; UINT32 Eip;
273 push dword ptr [ebp + 3 * 4]
274
275 ;; UINT32 Gdtr[2], Idtr[2];
276 sub esp, 8
277 sidt fword ptr [esp]
278 sub esp, 8
279 sgdt fword ptr [esp]
280
281 ;; UINT32 Ldtr, Tr;
282 xor eax, eax
283 str ax
284 push eax
285 sldt ax
286 push eax
287
288 ;; UINT32 EFlags;
289 push dword ptr [ebp + 5 * 4]
290
291 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
292 mov eax, cr4
293 or eax, 208h
294 mov cr4, eax
295 push eax
296 mov eax, cr3
297 push eax
298 mov eax, cr2
299 push eax
300 xor eax, eax
301 push eax
302 mov eax, cr0
303 push eax
304
305 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
306 mov eax, dr7
307 push eax
308 ;; clear Dr7 while executing debugger itself
309 xor eax, eax
310 mov dr7, eax
311
312 mov eax, dr6
313 push eax
314 ;; insure all status bits in dr6 are clear...
315 xor eax, eax
316 mov dr6, eax
317
318 mov eax, dr3
319 push eax
320 mov eax, dr2
321 push eax
322 mov eax, dr1
323 push eax
324 mov eax, dr0
325 push eax
326
327 ;; FX_SAVE_STATE_IA32 FxSaveState;
328 sub esp, 512
329 mov edi, esp
330 db 0fh, 0aeh, 00000111y ;fxsave [edi]
331
332 ;; UINT32 ExceptionData;
333 push dword ptr [ebp + 2 * 4]
334
335 ;; Prepare parameter and call
336 mov edx, esp
337 push edx
338 mov eax, dword ptr [ebp + 1 * 4]
339 push eax
340 cmp eax, 32
341 jb CallException
342 call TimerHandler
343 jmp ExceptionDone
344 CallException:
345 call ExceptionHandler
346 ExceptionDone:
347 add esp, 8
348
349 cli
350 ;; UINT32 ExceptionData;
351 add esp, 4
352
353 ;; FX_SAVE_STATE_IA32 FxSaveState;
354 mov esi, esp
355 db 0fh, 0aeh, 00001110y ; fxrstor [esi]
356 add esp, 512
357
358 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
359 pop eax
360 mov dr0, eax
361 pop eax
362 mov dr1, eax
363 pop eax
364 mov dr2, eax
365 pop eax
366 mov dr3, eax
367 ;; skip restore of dr6. We cleared dr6 during the context save.
368 add esp, 4
369 pop eax
370 mov dr7, eax
371
372 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
373 pop eax
374 mov cr0, eax
375 add esp, 4 ; not for Cr1
376 pop eax
377 mov cr2, eax
378 pop eax
379 mov cr3, eax
380 pop eax
381 mov cr4, eax
382
383 ;; UINT32 EFlags;
384 pop dword ptr [ebp + 5 * 4]
385
386 ;; UINT32 Ldtr, Tr;
387 ;; UINT32 Gdtr[2], Idtr[2];
388 ;; Best not let anyone mess with these particular registers...
389 add esp, 24
390
391 ;; UINT32 Eip;
392 pop dword ptr [ebp + 3 * 4]
393
394 ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
395 ;; NOTE - modified segment registers could hang the debugger... We
396 ;; could attempt to insulate ourselves against this possibility,
397 ;; but that poses risks as well.
398 ;;
399 pop gs
400 pop fs
401 pop es
402 pop ds
403 pop dword ptr [ebp + 4 * 4]
404 pop ss
405
406 ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
407 pop edi
408 pop esi
409 add esp, 4 ; not for ebp
410 add esp, 4 ; not for esp
411 pop ebx
412 pop edx
413 pop ecx
414 pop eax
415
416 mov esp, ebp
417 pop ebp
418 add esp, 8
419 iretd
420
421
422 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
423 ; data
424 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
425
426 align 02h
427
428 gdtr dw GDT_END - GDT_BASE - 1 ; GDT limit
429 dd 0 ; (GDT base gets set above)
430 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
431 ; global descriptor table (GDT)
432 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
433
434 align 02h
435
436 public GDT_BASE
437 GDT_BASE:
438 ; null descriptor
439 NULL_SEL equ $-GDT_BASE
440 dw 0 ; limit 15:0
441 dw 0 ; base 15:0
442 db 0 ; base 23:16
443 db 0 ; type
444 db 0 ; limit 19:16, flags
445 db 0 ; base 31:24
446
447 ; linear data segment descriptor
448 LINEAR_SEL equ $-GDT_BASE
449 dw 0FFFFh ; limit 0xFFFFF
450 dw 0 ; base 0
451 db 0
452 db 092h ; present, ring 0, data, expand-up, writable
453 db 0CFh ; page-granular, 32-bit
454 db 0
455
456 ; linear code segment descriptor
457 LINEAR_CODE_SEL equ $-GDT_BASE
458 dw 0FFFFh ; limit 0xFFFFF
459 dw 0 ; base 0
460 db 0
461 db 09Ah ; present, ring 0, data, expand-up, writable
462 db 0CFh ; page-granular, 32-bit
463 db 0
464
465 ; system data segment descriptor
466 SYS_DATA_SEL equ $-GDT_BASE
467 dw 0FFFFh ; limit 0xFFFFF
468 dw 0 ; base 0
469 db 0
470 db 092h ; present, ring 0, data, expand-up, writable
471 db 0CFh ; page-granular, 32-bit
472 db 0
473
474 ; system code segment descriptor
475 SYS_CODE_SEL equ $-GDT_BASE
476 dw 0FFFFh ; limit 0xFFFFF
477 dw 0 ; base 0
478 db 0
479 db 09Ah ; present, ring 0, data, expand-up, writable
480 db 0CFh ; page-granular, 32-bit
481 db 0
482
483 ; spare segment descriptor
484 SPARE3_SEL equ $-GDT_BASE
485 dw 0 ; limit 0xFFFFF
486 dw 0 ; base 0
487 db 0
488 db 0 ; present, ring 0, data, expand-up, writable
489 db 0 ; page-granular, 32-bit
490 db 0
491
492 ; spare segment descriptor
493 SPARE4_SEL equ $-GDT_BASE
494 dw 0 ; limit 0xFFFFF
495 dw 0 ; base 0
496 db 0
497 db 0 ; present, ring 0, data, expand-up, writable
498 db 0 ; page-granular, 32-bit
499 db 0
500
501 ; spare segment descriptor
502 SPARE5_SEL equ $-GDT_BASE
503 dw 0 ; limit 0xFFFFF
504 dw 0 ; base 0
505 db 0
506 db 0 ; present, ring 0, data, expand-up, writable
507 db 0 ; page-granular, 32-bit
508 db 0
509
510 GDT_END:
511
512 align 02h
513
514
515
516 idtr dw IDT_END - IDT_BASE - 1 ; IDT limit
517 dd 0 ; (IDT base gets set above)
518 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
519 ; interrupt descriptor table (IDT)
520 ;
521 ; Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
522 ; mappings. This implementation only uses the system timer and all other
523 ; IRQs will remain masked. The descriptors for vectors 33+ are provided
524 ; for convenience.
525 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
526
527 ;idt_tag db "IDT",0
528 align 02h
529
530 public IDT_BASE
531 IDT_BASE:
532 ; divide by zero (INT 0)
533 DIV_ZERO_SEL equ $-IDT_BASE
534 dw 0 ; offset 15:0
535 dw SYS_CODE_SEL ; selector 15:0
536 db 0 ; 0 for interrupt gate
537 db 0eh OR 80h ; type = 386 interrupt gate, present
538 dw 0 ; offset 31:16
539
540 ; debug exception (INT 1)
541 DEBUG_EXCEPT_SEL equ $-IDT_BASE
542 dw 0 ; offset 15:0
543 dw SYS_CODE_SEL ; selector 15:0
544 db 0 ; 0 for interrupt gate
545 db 0eh OR 80h ; type = 386 interrupt gate, present
546 dw 0 ; offset 31:16
547
548 ; NMI (INT 2)
549 NMI_SEL equ $-IDT_BASE
550 dw 0 ; offset 15:0
551 dw SYS_CODE_SEL ; selector 15:0
552 db 0 ; 0 for interrupt gate
553 db 0eh OR 80h ; type = 386 interrupt gate, present
554 dw 0 ; offset 31:16
555
556 ; soft breakpoint (INT 3)
557 BREAKPOINT_SEL equ $-IDT_BASE
558 dw 0 ; offset 15:0
559 dw SYS_CODE_SEL ; selector 15:0
560 db 0 ; 0 for interrupt gate
561 db 0eh OR 80h ; type = 386 interrupt gate, present
562 dw 0 ; offset 31:16
563
564 ; overflow (INT 4)
565 OVERFLOW_SEL equ $-IDT_BASE
566 dw 0 ; offset 15:0
567 dw SYS_CODE_SEL ; selector 15:0
568 db 0 ; 0 for interrupt gate
569 db 0eh OR 80h ; type = 386 interrupt gate, present
570 dw 0 ; offset 31:16
571
572 ; bounds check (INT 5)
573 BOUNDS_CHECK_SEL equ $-IDT_BASE
574 dw 0 ; offset 15:0
575 dw SYS_CODE_SEL ; selector 15:0
576 db 0 ; 0 for interrupt gate
577 db 0eh OR 80h ; type = 386 interrupt gate, present
578 dw 0 ; offset 31:16
579
580 ; invalid opcode (INT 6)
581 INVALID_OPCODE_SEL equ $-IDT_BASE
582 dw 0 ; offset 15:0
583 dw SYS_CODE_SEL ; selector 15:0
584 db 0 ; 0 for interrupt gate
585 db 0eh OR 80h ; type = 386 interrupt gate, present
586 dw 0 ; offset 31:16
587
588 ; device not available (INT 7)
589 DEV_NOT_AVAIL_SEL equ $-IDT_BASE
590 dw 0 ; offset 15:0
591 dw SYS_CODE_SEL ; selector 15:0
592 db 0 ; 0 for interrupt gate
593 db 0eh OR 80h ; type = 386 interrupt gate, present
594 dw 0 ; offset 31:16
595
596 ; double fault (INT 8)
597 DOUBLE_FAULT_SEL equ $-IDT_BASE
598 dw 0 ; offset 15:0
599 dw SYS_CODE_SEL ; selector 15:0
600 db 0 ; 0 for interrupt gate
601 db 0eh OR 80h ; type = 386 interrupt gate, present
602 dw 0 ; offset 31:16
603
604 ; Coprocessor segment overrun - reserved (INT 9)
605 RSVD_INTR_SEL1 equ $-IDT_BASE
606 dw 0 ; offset 15:0
607 dw SYS_CODE_SEL ; selector 15:0
608 db 0 ; 0 for interrupt gate
609 db 0eh OR 80h ; type = 386 interrupt gate, present
610 dw 0 ; offset 31:16
611
612 ; invalid TSS (INT 0ah)
613 INVALID_TSS_SEL equ $-IDT_BASE
614 dw 0 ; offset 15:0
615 dw SYS_CODE_SEL ; selector 15:0
616 db 0 ; 0 for interrupt gate
617 db 0eh OR 80h ; type = 386 interrupt gate, present
618 dw 0 ; offset 31:16
619
620 ; segment not present (INT 0bh)
621 SEG_NOT_PRESENT_SEL equ $-IDT_BASE
622 dw 0 ; offset 15:0
623 dw SYS_CODE_SEL ; selector 15:0
624 db 0 ; 0 for interrupt gate
625 db 0eh OR 80h ; type = 386 interrupt gate, present
626 dw 0 ; offset 31:16
627
628 ; stack fault (INT 0ch)
629 STACK_FAULT_SEL equ $-IDT_BASE
630 dw 0 ; offset 15:0
631 dw SYS_CODE_SEL ; selector 15:0
632 db 0 ; 0 for interrupt gate
633 db 0eh OR 80h ; type = 386 interrupt gate, present
634 dw 0 ; offset 31:16
635
636 ; general protection (INT 0dh)
637 GP_FAULT_SEL equ $-IDT_BASE
638 dw 0 ; offset 15:0
639 dw SYS_CODE_SEL ; selector 15:0
640 db 0 ; 0 for interrupt gate
641 db 0eh OR 80h ; type = 386 interrupt gate, present
642 dw 0 ; offset 31:16
643
644 ; page fault (INT 0eh)
645 PAGE_FAULT_SEL equ $-IDT_BASE
646 dw 0 ; offset 15:0
647 dw SYS_CODE_SEL ; selector 15:0
648 db 0 ; 0 for interrupt gate
649 db 0eh OR 80h ; type = 386 interrupt gate, present
650 dw 0 ; offset 31:16
651
652 ; Intel reserved - do not use (INT 0fh)
653 RSVD_INTR_SEL2 equ $-IDT_BASE
654 dw 0 ; offset 15:0
655 dw SYS_CODE_SEL ; selector 15:0
656 db 0 ; 0 for interrupt gate
657 db 0eh OR 80h ; type = 386 interrupt gate, present
658 dw 0 ; offset 31:16
659
660 ; floating point error (INT 10h)
661 FLT_POINT_ERR_SEL equ $-IDT_BASE
662 dw 0 ; offset 15:0
663 dw SYS_CODE_SEL ; selector 15:0
664 db 0 ; 0 for interrupt gate
665 db 0eh OR 80h ; type = 386 interrupt gate, present
666 dw 0 ; offset 31:16
667
668 ; alignment check (INT 11h)
669 ALIGNMENT_CHECK_SEL equ $-IDT_BASE
670 dw 0 ; offset 15:0
671 dw SYS_CODE_SEL ; selector 15:0
672 db 0 ; 0 for interrupt gate
673 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
674 dw 0 ; offset 31:16
675
676 ; machine check (INT 12h)
677 MACHINE_CHECK_SEL equ $-IDT_BASE
678 dw 0 ; offset 15:0
679 dw SYS_CODE_SEL ; selector 15:0
680 db 0 ; 0 for interrupt gate
681 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
682 dw 0 ; offset 31:16
683
684 ; SIMD floating-point exception (INT 13h)
685 SIMD_EXCEPTION_SEL equ $-IDT_BASE
686 dw 0 ; offset 15:0
687 dw SYS_CODE_SEL ; selector 15:0
688 db 0 ; 0 for interrupt gate
689 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
690 dw 0 ; offset 31:16
691
692 REPEAT (32 - 20)
693 dw 0 ; offset 15:0
694 dw SYS_CODE_SEL ; selector 15:0
695 db 0 ; 0 for interrupt gate
696 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
697 dw 0 ; offset 31:16
698 ENDM
699
700 ; 72 unspecified descriptors
701 db (72 * 8) dup(0)
702
703 ; IRQ 0 (System timer) - (INT 68h)
704 IRQ0_SEL equ $-IDT_BASE
705 dw 0 ; offset 15:0
706 dw SYS_CODE_SEL ; selector 15:0
707 db 0 ; 0 for interrupt gate
708 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
709 dw 0 ; offset 31:16
710
711 ; IRQ 1 (8042 Keyboard controller) - (INT 69h)
712 IRQ1_SEL equ $-IDT_BASE
713 dw 0 ; offset 15:0
714 dw SYS_CODE_SEL ; selector 15:0
715 db 0 ; 0 for interrupt gate
716 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
717 dw 0 ; offset 31:16
718
719 ; Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
720 IRQ2_SEL equ $-IDT_BASE
721 dw 0 ; offset 15:0
722 dw SYS_CODE_SEL ; selector 15:0
723 db 0 ; 0 for interrupt gate
724 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
725 dw 0 ; offset 31:16
726
727 ; IRQ 3 (COM 2) - (INT 6bh)
728 IRQ3_SEL equ $-IDT_BASE
729 dw 0 ; offset 15:0
730 dw SYS_CODE_SEL ; selector 15:0
731 db 0 ; 0 for interrupt gate
732 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
733 dw 0 ; offset 31:16
734
735 ; IRQ 4 (COM 1) - (INT 6ch)
736 IRQ4_SEL equ $-IDT_BASE
737 dw 0 ; offset 15:0
738 dw SYS_CODE_SEL ; selector 15:0
739 db 0 ; 0 for interrupt gate
740 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
741 dw 0 ; offset 31:16
742
743 ; IRQ 5 (LPT 2) - (INT 6dh)
744 IRQ5_SEL equ $-IDT_BASE
745 dw 0 ; offset 15:0
746 dw SYS_CODE_SEL ; selector 15:0
747 db 0 ; 0 for interrupt gate
748 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
749 dw 0 ; offset 31:16
750
751 ; IRQ 6 (Floppy controller) - (INT 6eh)
752 IRQ6_SEL equ $-IDT_BASE
753 dw 0 ; offset 15:0
754 dw SYS_CODE_SEL ; selector 15:0
755 db 0 ; 0 for interrupt gate
756 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
757 dw 0 ; offset 31:16
758
759 ; IRQ 7 (LPT 1) - (INT 6fh)
760 IRQ7_SEL equ $-IDT_BASE
761 dw 0 ; offset 15:0
762 dw SYS_CODE_SEL ; selector 15:0
763 db 0 ; 0 for interrupt gate
764 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
765 dw 0 ; offset 31:16
766
767 ; IRQ 8 (RTC Alarm) - (INT 70h)
768 IRQ8_SEL equ $-IDT_BASE
769 dw 0 ; offset 15:0
770 dw SYS_CODE_SEL ; selector 15:0
771 db 0 ; 0 for interrupt gate
772 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
773 dw 0 ; offset 31:16
774
775 ; IRQ 9 - (INT 71h)
776 IRQ9_SEL equ $-IDT_BASE
777 dw 0 ; offset 15:0
778 dw SYS_CODE_SEL ; selector 15:0
779 db 0 ; 0 for interrupt gate
780 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
781 dw 0 ; offset 31:16
782
783 ; IRQ 10 - (INT 72h)
784 IRQ10_SEL equ $-IDT_BASE
785 dw 0 ; offset 15:0
786 dw SYS_CODE_SEL ; selector 15:0
787 db 0 ; 0 for interrupt gate
788 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
789 dw 0 ; offset 31:16
790
791 ; IRQ 11 - (INT 73h)
792 IRQ11_SEL equ $-IDT_BASE
793 dw 0 ; offset 15:0
794 dw SYS_CODE_SEL ; selector 15:0
795 db 0 ; 0 for interrupt gate
796 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
797 dw 0 ; offset 31:16
798
799 ; IRQ 12 (PS/2 mouse) - (INT 74h)
800 IRQ12_SEL equ $-IDT_BASE
801 dw 0 ; offset 15:0
802 dw SYS_CODE_SEL ; selector 15:0
803 db 0 ; 0 for interrupt gate
804 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
805 dw 0 ; offset 31:16
806
807 ; IRQ 13 (Floating point error) - (INT 75h)
808 IRQ13_SEL equ $-IDT_BASE
809 dw 0 ; offset 15:0
810 dw SYS_CODE_SEL ; selector 15:0
811 db 0 ; 0 for interrupt gate
812 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
813 dw 0 ; offset 31:16
814
815 ; IRQ 14 (Secondary IDE) - (INT 76h)
816 IRQ14_SEL equ $-IDT_BASE
817 dw 0 ; offset 15:0
818 dw SYS_CODE_SEL ; selector 15:0
819 db 0 ; 0 for interrupt gate
820 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
821 dw 0 ; offset 31:16
822
823 ; IRQ 15 (Primary IDE) - (INT 77h)
824 IRQ15_SEL equ $-IDT_BASE
825 dw 0 ; offset 15:0
826 dw SYS_CODE_SEL ; selector 15:0
827 db 0 ; 0 for interrupt gate
828 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
829 dw 0 ; offset 31:16
830
831 db (1 * 8) dup(0)
832
833 IDT_END:
834
835 END