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1 TITLE CpuInterrupt.asm:
2 ;------------------------------------------------------------------------------
3 ;*
4 ;* Copyright 2006 - 2010, Intel Corporation
5 ;* All rights reserved. This program and the accompanying materials
6 ;* are licensed and made available under the terms and conditions of the BSD License
7 ;* which accompanies this distribution. The full text of the license may be found at
8 ;* http://opensource.org/licenses/bsd-license.php
9 ;*
10 ;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 ;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 ;*
13 ;* CpuInterrupt.asm
14 ;*
15 ;* Abstract:
16 ;*
17 ;------------------------------------------------------------------------------
18
19 EXTERNDEF mExceptionCodeSize:DWORD
20
21 .code
22
23 EXTERN TimerHandler: FAR
24 EXTERN ExceptionHandler: NEAR
25 EXTERN mTimerVector: QWORD
26
27 mExceptionCodeSize DD 9
28
29 InitDescriptor PROC
30 lea rax, [GDT_BASE] ; RAX=PHYSICAL address of gdt
31 mov qword ptr [gdtr + 2], rax ; Put address of gdt into the gdtr
32 lgdt fword ptr [gdtr]
33 mov rax, 18h
34 mov gs, rax
35 mov fs, rax
36 lea rax, [IDT_BASE] ; RAX=PHYSICAL address of idt
37 mov qword ptr [idtr + 2], rax ; Put address of idt into the idtr
38 lidt fword ptr [idtr]
39 ret
40 InitDescriptor ENDP
41
42 ; VOID
43 ; InstallInterruptHandler (
44 ; UINTN Vector, // rcx
45 ; void (*Handler)(void) // rdx
46 ; )
47 InstallInterruptHandler PROC
48 push rbx
49 pushfq ; save eflags
50 cli ; turn off interrupts
51 sub rsp, 10h ; open some space on the stack
52 mov rbx, rsp
53 sidt [rbx] ; get fword address of IDT
54 mov rbx, [rbx+2] ; move offset of IDT into RBX
55 add rsp, 10h ; correct stack
56 mov rax, rcx ; Get vector number
57 shl rax, 4 ; multiply by 16 to get offset
58 add rbx, rax ; add to IDT base to get entry
59 mov rax, rdx ; load new address into IDT entry
60 mov word ptr [rbx], ax ; write bits 15..0 of offset
61 shr rax, 16 ; use ax to copy 31..16 to descriptors
62 mov word ptr [rbx+6], ax ; write bits 31..16 of offset
63 shr rax, 16 ; use eax to copy 63..32 to descriptors
64 mov dword ptr [rbx+8], eax ; write bits 63..32 of offset
65 popfq ; restore flags (possible enabling interrupts)
66 pop rbx
67 ret
68
69 InstallInterruptHandler ENDP
70
71 JmpCommonIdtEntry macro
72 ; jmp commonIdtEntry - this must be hand coded to keep the assembler from
73 ; using a 8 bit reletive jump when the entries are
74 ; within 255 bytes of the common entry. This must
75 ; be done to maintain the consistency of the size
76 ; of entry points...
77 db 0e9h ; jmp 16 bit reletive
78 dd commonIdtEntry - $ - 4 ; offset to jump to
79 endm
80
81 align 02h
82 SystemExceptionHandler PROC
83 INT0:
84 push 0h ; push error code place holder on the stack
85 push 0h
86 JmpCommonIdtEntry
87 ; db 0e9h ; jmp 16 bit reletive
88 ; dd commonIdtEntry - $ - 4 ; offset to jump to
89
90 INT1:
91 push 0h ; push error code place holder on the stack
92 push 1h
93 JmpCommonIdtEntry
94
95 INT2:
96 push 0h ; push error code place holder on the stack
97 push 2h
98 JmpCommonIdtEntry
99
100 INT3:
101 push 0h ; push error code place holder on the stack
102 push 3h
103 JmpCommonIdtEntry
104
105 INT4:
106 push 0h ; push error code place holder on the stack
107 push 4h
108 JmpCommonIdtEntry
109
110 INT5:
111 push 0h ; push error code place holder on the stack
112 push 5h
113 JmpCommonIdtEntry
114
115 INT6:
116 push 0h ; push error code place holder on the stack
117 push 6h
118 JmpCommonIdtEntry
119
120 INT7:
121 push 0h ; push error code place holder on the stack
122 push 7h
123 JmpCommonIdtEntry
124
125 INT8:
126 ; Double fault causes an error code to be pushed so no phony push necessary
127 nop
128 nop
129 push 8h
130 JmpCommonIdtEntry
131
132 INT9:
133 push 0h ; push error code place holder on the stack
134 push 9h
135 JmpCommonIdtEntry
136
137 INT10:
138 ; Invalid TSS causes an error code to be pushed so no phony push necessary
139 nop
140 nop
141 push 10
142 JmpCommonIdtEntry
143
144 INT11:
145 ; Segment Not Present causes an error code to be pushed so no phony push necessary
146 nop
147 nop
148 push 11
149 JmpCommonIdtEntry
150
151 INT12:
152 ; Stack fault causes an error code to be pushed so no phony push necessary
153 nop
154 nop
155 push 12
156 JmpCommonIdtEntry
157
158 INT13:
159 ; GP fault causes an error code to be pushed so no phony push necessary
160 nop
161 nop
162 push 13
163 JmpCommonIdtEntry
164
165 INT14:
166 ; Page fault causes an error code to be pushed so no phony push necessary
167 nop
168 nop
169 push 14
170 JmpCommonIdtEntry
171
172 INT15:
173 push 0h ; push error code place holder on the stack
174 push 15
175 JmpCommonIdtEntry
176
177 INT16:
178 push 0h ; push error code place holder on the stack
179 push 16
180 JmpCommonIdtEntry
181
182 INT17:
183 ; Alignment check causes an error code to be pushed so no phony push necessary
184 nop
185 nop
186 push 17
187 JmpCommonIdtEntry
188
189 INT18:
190 push 0h ; push error code place holder on the stack
191 push 18
192 JmpCommonIdtEntry
193
194 INT19:
195 push 0h ; push error code place holder on the stack
196 push 19
197 JmpCommonIdtEntry
198
199 INTUnknown:
200 REPEAT (32 - 20)
201 push 0h ; push error code place holder on the stack
202 ; push xxh ; push vector number
203 db 06ah
204 db ( $ - INTUnknown - 3 ) / 9 + 20 ; vector number
205 JmpCommonIdtEntry
206 ENDM
207 SystemExceptionHandler ENDP
208
209 SystemTimerHandler PROC
210 push 0
211 push mTimerVector
212 JmpCommonIdtEntry
213 SystemTimerHandler ENDP
214
215 commonIdtEntry:
216 ; +---------------------+ <-- 16-byte aligned ensured by processor
217 ; + Old SS +
218 ; +---------------------+
219 ; + Old RSP +
220 ; +---------------------+
221 ; + RFlags +
222 ; +---------------------+
223 ; + CS +
224 ; +---------------------+
225 ; + RIP +
226 ; +---------------------+
227 ; + Error Code +
228 ; +---------------------+
229 ; + Vector Number +
230 ; +---------------------+
231 ; + RBP +
232 ; +---------------------+ <-- RBP, 16-byte aligned
233
234 cli
235 push rbp
236 mov rbp, rsp
237
238 ;
239 ; Since here the stack pointer is 16-byte aligned, so
240 ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
241 ; is 16-byte aligned
242 ;
243
244 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
245 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
246 push r15
247 push r14
248 push r13
249 push r12
250 push r11
251 push r10
252 push r9
253 push r8
254 push rax
255 push rcx
256 push rdx
257 push rbx
258 push qword ptr [rbp + 6 * 8] ; RSP
259 push qword ptr [rbp] ; RBP
260 push rsi
261 push rdi
262
263 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
264 movzx rax, word ptr [rbp + 7 * 8]
265 push rax ; for ss
266 movzx rax, word ptr [rbp + 4 * 8]
267 push rax ; for cs
268 mov rax, ds
269 push rax
270 mov rax, es
271 push rax
272 mov rax, fs
273 push rax
274 mov rax, gs
275 push rax
276
277 ;; UINT64 Rip;
278 push qword ptr [rbp + 3 * 8]
279
280 ;; UINT64 Gdtr[2], Idtr[2];
281 sub rsp, 16
282 sidt fword ptr [rsp]
283 sub rsp, 16
284 sgdt fword ptr [rsp]
285
286 ;; UINT64 Ldtr, Tr;
287 xor rax, rax
288 str ax
289 push rax
290 sldt ax
291 push rax
292
293 ;; UINT64 RFlags;
294 push qword ptr [rbp + 5 * 8]
295
296 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
297 mov rax, cr8
298 push rax
299 mov rax, cr4
300 or rax, 208h
301 mov cr4, rax
302 push rax
303 mov rax, cr3
304 push rax
305 mov rax, cr2
306 push rax
307 xor rax, rax
308 push rax
309 mov rax, cr0
310 push rax
311
312 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
313 mov rax, dr7
314 push rax
315 ;; clear Dr7 while executing debugger itself
316 xor rax, rax
317 mov dr7, rax
318
319 mov rax, dr6
320 push rax
321 ;; insure all status bits in dr6 are clear...
322 xor rax, rax
323 mov dr6, rax
324
325 mov rax, dr3
326 push rax
327 mov rax, dr2
328 push rax
329 mov rax, dr1
330 push rax
331 mov rax, dr0
332 push rax
333
334 ;; FX_SAVE_STATE_X64 FxSaveState;
335
336 sub rsp, 512
337 mov rdi, rsp
338 db 0fh, 0aeh, 00000111y ;fxsave [rdi]
339
340 ;; UINT32 ExceptionData;
341 push qword ptr [rbp + 2 * 8]
342
343 ;; call into exception handler
344 ;; Prepare parameter and call
345 mov rcx, qword ptr [rbp + 1 * 8]
346 mov rdx, rsp
347 ;
348 ; Per X64 calling convention, allocate maximum parameter stack space
349 ; and make sure RSP is 16-byte aligned
350 ;
351 sub rsp, 4 * 8 + 8
352 cmp rcx, 32
353 jb CallException
354 call TimerHandler
355 jmp ExceptionDone
356 CallException:
357 call ExceptionHandler
358 ExceptionDone:
359 add rsp, 4 * 8 + 8
360
361 cli
362 ;; UINT64 ExceptionData;
363 add rsp, 8
364
365 ;; FX_SAVE_STATE_X64 FxSaveState;
366
367 mov rsi, rsp
368 db 0fh, 0aeh, 00001110y ; fxrstor [rsi]
369 add rsp, 512
370
371 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
372 pop rax
373 mov dr0, rax
374 pop rax
375 mov dr1, rax
376 pop rax
377 mov dr2, rax
378 pop rax
379 mov dr3, rax
380 ;; skip restore of dr6. We cleared dr6 during the context save.
381 add rsp, 8
382 pop rax
383 mov dr7, rax
384
385 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
386 pop rax
387 mov cr0, rax
388 add rsp, 8 ; not for Cr1
389 pop rax
390 mov cr2, rax
391 pop rax
392 mov cr3, rax
393 pop rax
394 mov cr4, rax
395 pop rax
396 mov cr8, rax
397
398 ;; UINT64 RFlags;
399 pop qword ptr [rbp + 5 * 8]
400
401 ;; UINT64 Ldtr, Tr;
402 ;; UINT64 Gdtr[2], Idtr[2];
403 ;; Best not let anyone mess with these particular registers...
404 add rsp, 48
405
406 ;; UINT64 Rip;
407 pop qword ptr [rbp + 3 * 8]
408
409 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
410 pop rax
411 ; mov gs, rax ; not for gs
412 pop rax
413 ; mov fs, rax ; not for fs
414 ; (X64 will not use fs and gs, so we do not restore it)
415 pop rax
416 mov es, rax
417 pop rax
418 mov ds, rax
419 pop qword ptr [rbp + 4 * 8] ; for cs
420 pop qword ptr [rbp + 7 * 8] ; for ss
421
422 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
423 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
424 pop rdi
425 pop rsi
426 add rsp, 8 ; not for rbp
427 pop qword ptr [rbp + 6 * 8] ; for rsp
428 pop rbx
429 pop rdx
430 pop rcx
431 pop rax
432 pop r8
433 pop r9
434 pop r10
435 pop r11
436 pop r12
437 pop r13
438 pop r14
439 pop r15
440
441 mov rsp, rbp
442 pop rbp
443 add rsp, 16
444 iretq
445
446 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
447 ; data
448 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
449
450
451 gdtr dw GDT_END - GDT_BASE - 1 ; GDT limit
452 dq 0 ; (GDT base gets set above)
453 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
454 ; global descriptor table (GDT)
455 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
456
457 align 010h ; make GDT 16-byte align
458
459 public GDT_BASE
460 GDT_BASE:
461 ; null descriptor
462 NULL_SEL equ $-GDT_BASE ; Selector [0x0]
463 dw 0 ; limit 15:0
464 dw 0 ; base 15:0
465 db 0 ; base 23:16
466 db 0 ; type
467 db 0 ; limit 19:16, flags
468 db 0 ; base 31:24
469
470 ; linear data segment descriptor
471 LINEAR_SEL equ $-GDT_BASE ; Selector [0x8]
472 dw 0FFFFh ; limit 0xFFFFF
473 dw 0 ; base 0
474 db 0
475 db 092h ; present, ring 0, data, expand-up, writable
476 db 0CFh ; page-granular, 32-bit
477 db 0
478
479 ; linear code segment descriptor
480 LINEAR_CODE_SEL equ $-GDT_BASE ; Selector [0x10]
481 dw 0FFFFh ; limit 0xFFFFF
482 dw 0 ; base 0
483 db 0
484 db 09Ah ; present, ring 0, code, expand-up, writable
485 db 0CFh ; page-granular, 32-bit
486 db 0
487
488 ; system data segment descriptor
489 SYS_DATA_SEL equ $-GDT_BASE ; Selector [0x18]
490 dw 0FFFFh ; limit 0xFFFFF
491 dw 0 ; base 0
492 db 0
493 db 092h ; present, ring 0, data, expand-up, writable
494 db 0CFh ; page-granular, 32-bit
495 db 0
496
497 ; system code segment descriptor
498 SYS_CODE_SEL equ $-GDT_BASE ; Selector [0x20]
499 dw 0FFFFh ; limit 0xFFFFF
500 dw 0 ; base 0
501 db 0
502 db 09Ah ; present, ring 0, code, expand-up, writable
503 db 0CFh ; page-granular, 32-bit
504 db 0
505
506 ; spare segment descriptor
507 SPARE3_SEL equ $-GDT_BASE ; Selector [0x28]
508 dw 0
509 dw 0
510 db 0
511 db 0
512 db 0
513 db 0
514
515 ; system data segment descriptor
516 SYS_DATA64_SEL equ $-GDT_BASE ; Selector [0x30]
517 dw 0FFFFh ; limit 0xFFFFF
518 dw 0 ; base 0
519 db 0
520 db 092h ; present, ring 0, data, expand-up, writable
521 db 0CFh ; page-granular, 32-bit
522 db 0
523
524 ; system code segment descriptor
525 SYS_CODE64_SEL equ $-GDT_BASE ; Selector [0x38]
526 dw 0FFFFh ; limit 0xFFFFF
527 dw 0 ; base 0
528 db 0
529 db 09Ah ; present, ring 0, code, expand-up, writable
530 db 0AFh ; page-granular, 64-bit
531 db 0
532
533 ; spare segment descriptor
534 SPARE4_SEL equ $-GDT_BASE ; Selector [0x40]
535 dw 0
536 dw 0
537 db 0
538 db 0
539 db 0
540 db 0
541
542 GDT_END:
543
544 idtr dw IDT_END - IDT_BASE - 1 ; IDT limit
545 dq 0 ; (IDT base gets set above)
546
547 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
548 ; interrupt descriptor table (IDT)
549 ;
550 ; Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
551 ; mappings. This implementation only uses the system timer and all other
552 ; IRQs will remain masked. The descriptors for vectors 33+ are provided
553 ; for convenience.
554 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
555
556 align 08h ; make IDT 8-byte align
557
558 public IDT_BASE
559 IDT_BASE:
560 ; divide by zero (INT 0)
561 DIV_ZERO_SEL equ $-IDT_BASE
562 dw 0 ; offset 15:0
563 dw SYS_CODE64_SEL ; selector 15:0
564 db 0 ; 0 for interrupt gate
565 db 0eh OR 80h ; type = 386 interrupt gate, present
566 dw 0 ; offset 31:16
567 dd 0 ; offset 63:32
568 dd 0 ; 0 for reserved
569
570 ; debug exception (INT 1)
571 DEBUG_EXCEPT_SEL equ $-IDT_BASE
572 dw 0 ; offset 15:0
573 dw SYS_CODE64_SEL ; selector 15:0
574 db 0 ; 0 for interrupt gate
575 db 0eh OR 80h ; type = 386 interrupt gate, present
576 dw 0 ; offset 31:16
577 dd 0 ; offset 63:32
578 dd 0 ; 0 for reserved
579
580 ; NMI (INT 2)
581 NMI_SEL equ $-IDT_BASE
582 dw 0 ; offset 15:0
583 dw SYS_CODE64_SEL ; selector 15:0
584 db 0 ; 0 for interrupt gate
585 db 0eh OR 80h ; type = 386 interrupt gate, present
586 dw 0 ; offset 31:16
587 dd 0 ; offset 63:32
588 dd 0 ; 0 for reserved
589
590 ; soft breakpoint (INT 3)
591 BREAKPOINT_SEL equ $-IDT_BASE
592 dw 0 ; offset 15:0
593 dw SYS_CODE64_SEL ; selector 15:0
594 db 0 ; 0 for interrupt gate
595 db 0eh OR 80h ; type = 386 interrupt gate, present
596 dw 0 ; offset 31:16
597 dd 0 ; offset 63:32
598 dd 0 ; 0 for reserved
599
600 ; overflow (INT 4)
601 OVERFLOW_SEL equ $-IDT_BASE
602 dw 0 ; offset 15:0
603 dw SYS_CODE64_SEL ; selector 15:0
604 db 0 ; 0 for interrupt gate
605 db 0eh OR 80h ; type = 386 interrupt gate, present
606 dw 0 ; offset 31:16
607 dd 0 ; offset 63:32
608 dd 0 ; 0 for reserved
609
610 ; bounds check (INT 5)
611 BOUNDS_CHECK_SEL equ $-IDT_BASE
612 dw 0 ; offset 15:0
613 dw SYS_CODE64_SEL ; selector 15:0
614 db 0 ; 0 for interrupt gate
615 db 0eh OR 80h ; type = 386 interrupt gate, present
616 dw 0 ; offset 31:16
617 dd 0 ; offset 63:32
618 dd 0 ; 0 for reserved
619
620 ; invalid opcode (INT 6)
621 INVALID_OPCODE_SEL equ $-IDT_BASE
622 dw 0 ; offset 15:0
623 dw SYS_CODE64_SEL ; selector 15:0
624 db 0 ; 0 for interrupt gate
625 db 0eh OR 80h ; type = 386 interrupt gate, present
626 dw 0 ; offset 31:16
627 dd 0 ; offset 63:32
628 dd 0 ; 0 for reserved
629
630 ; device not available (INT 7)
631 DEV_NOT_AVAIL_SEL equ $-IDT_BASE
632 dw 0 ; offset 15:0
633 dw SYS_CODE64_SEL ; selector 15:0
634 db 0 ; 0 for interrupt gate
635 db 0eh OR 80h ; type = 386 interrupt gate, present
636 dw 0 ; offset 31:16
637 dd 0 ; offset 63:32
638 dd 0 ; 0 for reserved
639
640 ; double fault (INT 8)
641 DOUBLE_FAULT_SEL equ $-IDT_BASE
642 dw 0 ; offset 15:0
643 dw SYS_CODE64_SEL ; selector 15:0
644 db 0 ; 0 for interrupt gate
645 db 0eh OR 80h ; type = 386 interrupt gate, present
646 dw 0 ; offset 31:16
647 dd 0 ; offset 63:32
648 dd 0 ; 0 for reserved
649
650 ; Coprocessor segment overrun - reserved (INT 9)
651 RSVD_INTR_SEL1 equ $-IDT_BASE
652 dw 0 ; offset 15:0
653 dw SYS_CODE64_SEL ; selector 15:0
654 db 0 ; 0 for interrupt gate
655 db 0eh OR 80h ; type = 386 interrupt gate, present
656 dw 0 ; offset 31:16
657 dd 0 ; offset 63:32
658 dd 0 ; 0 for reserved
659
660 ; invalid TSS (INT 0ah)
661 INVALID_TSS_SEL equ $-IDT_BASE
662 dw 0 ; offset 15:0
663 dw SYS_CODE64_SEL ; selector 15:0
664 db 0 ; 0 for interrupt gate
665 db 0eh OR 80h ; type = 386 interrupt gate, present
666 dw 0 ; offset 31:16
667 dd 0 ; offset 63:32
668 dd 0 ; 0 for reserved
669
670 ; segment not present (INT 0bh)
671 SEG_NOT_PRESENT_SEL equ $-IDT_BASE
672 dw 0 ; offset 15:0
673 dw SYS_CODE64_SEL ; selector 15:0
674 db 0 ; 0 for interrupt gate
675 db 0eh OR 80h ; type = 386 interrupt gate, present
676 dw 0 ; offset 31:16
677 dd 0 ; offset 63:32
678 dd 0 ; 0 for reserved
679
680 ; stack fault (INT 0ch)
681 STACK_FAULT_SEL equ $-IDT_BASE
682 dw 0 ; offset 15:0
683 dw SYS_CODE64_SEL ; selector 15:0
684 db 0 ; 0 for interrupt gate
685 db 0eh OR 80h ; type = 386 interrupt gate, present
686 dw 0 ; offset 31:16
687 dd 0 ; offset 63:32
688 dd 0 ; 0 for reserved
689
690 ; general protection (INT 0dh)
691 GP_FAULT_SEL equ $-IDT_BASE
692 dw 0 ; offset 15:0
693 dw SYS_CODE64_SEL ; selector 15:0
694 db 0 ; 0 for interrupt gate
695 db 0eh OR 80h ; type = 386 interrupt gate, present
696 dw 0 ; offset 31:16
697 dd 0 ; offset 63:32
698 dd 0 ; 0 for reserved
699
700 ; page fault (INT 0eh)
701 PAGE_FAULT_SEL equ $-IDT_BASE
702 dw 0 ; offset 15:0
703 dw SYS_CODE64_SEL ; selector 15:0
704 db 0 ; 0 for interrupt gate
705 db 0eh OR 80h ; type = 386 interrupt gate, present
706 dw 0 ; offset 31:16
707 dd 0 ; offset 63:32
708 dd 0 ; 0 for reserved
709
710 ; Intel reserved - do not use (INT 0fh)
711 RSVD_INTR_SEL2 equ $-IDT_BASE
712 dw 0 ; offset 15:0
713 dw SYS_CODE64_SEL ; selector 15:0
714 db 0 ; 0 for interrupt gate
715 db 0eh OR 80h ; type = 386 interrupt gate, present
716 dw 0 ; offset 31:16
717 dd 0 ; offset 63:32
718 dd 0 ; 0 for reserved
719
720 ; floating point error (INT 10h)
721 FLT_POINT_ERR_SEL equ $-IDT_BASE
722 dw 0 ; offset 15:0
723 dw SYS_CODE64_SEL ; selector 15:0
724 db 0 ; 0 for interrupt gate
725 db 0eh OR 80h ; type = 386 interrupt gate, present
726 dw 0 ; offset 31:16
727 dd 0 ; offset 63:32
728 dd 0 ; 0 for reserved
729
730 ; alignment check (INT 11h)
731 ALIGNMENT_CHECK_SEL equ $-IDT_BASE
732 dw 0 ; offset 15:0
733 dw SYS_CODE64_SEL ; selector 15:0
734 db 0 ; 0 for interrupt gate
735 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
736 dw 0 ; offset 31:16
737 dd 0 ; offset 63:32
738 dd 0 ; 0 for reserved
739
740 ; machine check (INT 12h)
741 MACHINE_CHECK_SEL equ $-IDT_BASE
742 dw 0 ; offset 15:0
743 dw SYS_CODE64_SEL ; selector 15:0
744 db 0 ; 0 for interrupt gate
745 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
746 dw 0 ; offset 31:16
747 dd 0 ; offset 63:32
748 dd 0 ; 0 for reserved
749
750 ; SIMD floating-point exception (INT 13h)
751 SIMD_EXCEPTION_SEL equ $-IDT_BASE
752 dw 0 ; offset 15:0
753 dw SYS_CODE64_SEL ; selector 15:0
754 db 0 ; 0 for interrupt gate
755 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
756 dw 0 ; offset 31:16
757 dd 0 ; offset 63:32
758 dd 0 ; 0 for reserved
759
760 REPEAT (32 - 20)
761 dw 0 ; offset 15:0
762 dw SYS_CODE64_SEL ; selector 15:0
763 db 0 ; 0 for interrupt gate
764 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
765 dw 0 ; offset 31:16
766 dd 0 ; offset 63:32
767 dd 0 ; 0 for reserved
768 ENDM
769
770 ; 72 unspecified descriptors
771 db (72 * 16) dup(0)
772
773 ; IRQ 0 (System timer) - (INT 68h)
774 IRQ0_SEL equ $-IDT_BASE
775 dw 0 ; offset 15:0
776 dw SYS_CODE64_SEL ; selector 15:0
777 db 0 ; 0 for interrupt gate
778 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
779 dw 0 ; offset 31:16
780 dd 0 ; offset 63:32
781 dd 0 ; 0 for reserved
782
783 ; IRQ 1 (8042 Keyboard controller) - (INT 69h)
784 IRQ1_SEL equ $-IDT_BASE
785 dw 0 ; offset 15:0
786 dw SYS_CODE64_SEL ; selector 15:0
787 db 0 ; 0 for interrupt gate
788 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
789 dw 0 ; offset 31:16
790 dd 0 ; offset 63:32
791 dd 0 ; 0 for reserved
792
793 ; Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
794 IRQ2_SEL equ $-IDT_BASE
795 dw 0 ; offset 15:0
796 dw SYS_CODE64_SEL ; selector 15:0
797 db 0 ; 0 for interrupt gate
798 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
799 dw 0 ; offset 31:16
800 dd 0 ; offset 63:32
801 dd 0 ; 0 for reserved
802
803 ; IRQ 3 (COM 2) - (INT 6bh)
804 IRQ3_SEL equ $-IDT_BASE
805 dw 0 ; offset 15:0
806 dw SYS_CODE64_SEL ; selector 15:0
807 db 0 ; 0 for interrupt gate
808 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
809 dw 0 ; offset 31:16
810 dd 0 ; offset 63:32
811 dd 0 ; 0 for reserved
812
813 ; IRQ 4 (COM 1) - (INT 6ch)
814 IRQ4_SEL equ $-IDT_BASE
815 dw 0 ; offset 15:0
816 dw SYS_CODE64_SEL ; selector 15:0
817 db 0 ; 0 for interrupt gate
818 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
819 dw 0 ; offset 31:16
820 dd 0 ; offset 63:32
821 dd 0 ; 0 for reserved
822
823 ; IRQ 5 (LPT 2) - (INT 6dh)
824 IRQ5_SEL equ $-IDT_BASE
825 dw 0 ; offset 15:0
826 dw SYS_CODE64_SEL ; selector 15:0
827 db 0 ; 0 for interrupt gate
828 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
829 dw 0 ; offset 31:16
830 dd 0 ; offset 63:32
831 dd 0 ; 0 for reserved
832
833 ; IRQ 6 (Floppy controller) - (INT 6eh)
834 IRQ6_SEL equ $-IDT_BASE
835 dw 0 ; offset 15:0
836 dw SYS_CODE64_SEL ; selector 15:0
837 db 0 ; 0 for interrupt gate
838 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
839 dw 0 ; offset 31:16
840 dd 0 ; offset 63:32
841 dd 0 ; 0 for reserved
842
843 ; IRQ 7 (LPT 1) - (INT 6fh)
844 IRQ7_SEL equ $-IDT_BASE
845 dw 0 ; offset 15:0
846 dw SYS_CODE64_SEL ; selector 15:0
847 db 0 ; 0 for interrupt gate
848 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
849 dw 0 ; offset 31:16
850 dd 0 ; offset 63:32
851 dd 0 ; 0 for reserved
852
853 ; IRQ 8 (RTC Alarm) - (INT 70h)
854 IRQ8_SEL equ $-IDT_BASE
855 dw 0 ; offset 15:0
856 dw SYS_CODE64_SEL ; selector 15:0
857 db 0 ; 0 for interrupt gate
858 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
859 dw 0 ; offset 31:16
860 dd 0 ; offset 63:32
861 dd 0 ; 0 for reserved
862
863 ; IRQ 9 - (INT 71h)
864 IRQ9_SEL equ $-IDT_BASE
865 dw 0 ; offset 15:0
866 dw SYS_CODE64_SEL ; selector 15:0
867 db 0 ; 0 for interrupt gate
868 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
869 dw 0 ; offset 31:16
870 dd 0 ; offset 63:32
871 dd 0 ; 0 for reserved
872
873 ; IRQ 10 - (INT 72h)
874 IRQ10_SEL equ $-IDT_BASE
875 dw 0 ; offset 15:0
876 dw SYS_CODE64_SEL ; selector 15:0
877 db 0 ; 0 for interrupt gate
878 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
879 dw 0 ; offset 31:16
880 dd 0 ; offset 63:32
881 dd 0 ; 0 for reserved
882
883 ; IRQ 11 - (INT 73h)
884 IRQ11_SEL equ $-IDT_BASE
885 dw 0 ; offset 15:0
886 dw SYS_CODE64_SEL ; selector 15:0
887 db 0 ; 0 for interrupt gate
888 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
889 dw 0 ; offset 31:16
890 dd 0 ; offset 63:32
891 dd 0 ; 0 for reserved
892
893 ; IRQ 12 (PS/2 mouse) - (INT 74h)
894 IRQ12_SEL equ $-IDT_BASE
895 dw 0 ; offset 15:0
896 dw SYS_CODE64_SEL ; selector 15:0
897 db 0 ; 0 for interrupt gate
898 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
899 dw 0 ; offset 31:16
900 dd 0 ; offset 63:32
901 dd 0 ; 0 for reserved
902
903 ; IRQ 13 (Floating point error) - (INT 75h)
904 IRQ13_SEL equ $-IDT_BASE
905 dw 0 ; offset 15:0
906 dw SYS_CODE64_SEL ; selector 15:0
907 db 0 ; 0 for interrupt gate
908 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
909 dw 0 ; offset 31:16
910 dd 0 ; offset 63:32
911 dd 0 ; 0 for reserved
912
913 ; IRQ 14 (Secondary IDE) - (INT 76h)
914 IRQ14_SEL equ $-IDT_BASE
915 dw 0 ; offset 15:0
916 dw SYS_CODE64_SEL ; selector 15:0
917 db 0 ; 0 for interrupt gate
918 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
919 dw 0 ; offset 31:16
920 dd 0 ; offset 63:32
921 dd 0 ; 0 for reserved
922
923 ; IRQ 15 (Primary IDE) - (INT 77h)
924 IRQ15_SEL equ $-IDT_BASE
925 dw 0 ; offset 15:0
926 dw SYS_CODE64_SEL ; selector 15:0
927 db 0 ; 0 for interrupt gate
928 db 0eh OR 80h ; (10001110)type = 386 interrupt gate, present
929 dw 0 ; offset 31:16
930 dd 0 ; offset 63:32
931 dd 0 ; 0 for reserved
932
933 db (1 * 16) dup(0)
934
935 IDT_END:
936
937
938 END
EFI Development Kit II mirror for PVE