EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/CpuIA32.h

   1 /*++
   2
   3 Copyright (c) 2004 - 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   CpuIA32.h
  15
  16 Abstract:
  17
  18 --*/
  19
  20 #ifndef _CPU_IA32_H
  21 #define _CPU_IA32_H
  22
  23 #include "Tiano.h"
  24
  25 #define IA32API __cdecl
  26
  27 typedef struct {
  28   UINT32  RegEax;
  29   UINT32  RegEbx;
  30   UINT32  RegEcx;
  31   UINT32  RegEdx;
  32 } EFI_CPUID_REGISTER;
  33
  34 typedef struct {
  35   UINT32  HeaderVersion;
  36   UINT32  UpdateRevision;
  37   UINT32  Date;
  38   UINT32  ProcessorId;
  39   UINT32  Checksum;
  40   UINT32  LoaderRevision;
  41   UINT32  ProcessorFlags;
  42   UINT32  DataSize;
  43   UINT32  TotalSize;
  44   UINT8   Reserved[12];
  45 } EFI_CPU_MICROCODE_HEADER;
  46
  47 typedef struct {
  48   UINT32  ExtendedSignatureCount;
  49   UINT32  ExtendedTableChecksum;
  50   UINT8   Reserved[12];
  51 } EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
  52
  53 typedef struct {
  54   UINT32  ProcessorSignature;
  55   UINT32  ProcessorFlag;
  56   UINT32  ProcessorChecksum;
  57 } EFI_CPU_MICROCODE_EXTENDED_TABLE;
  58
  59 typedef struct {
  60   UINT32  Stepping       : 4;
  61   UINT32  Model          : 4;
  62   UINT32  Family         : 4;
  63   UINT32  Type           : 2;
  64   UINT32  Reserved1      : 2;
  65   UINT32  ExtendedModel  : 4;
  66   UINT32  ExtendedFamily : 8;
  67   UINT32  Reserved2      : 4;
  68 } EFI_CPU_VERSION;
  69
  70 #define EFI_CPUID_SIGNATURE                   0x0
  71 #define EFI_CPUID_VERSION_INFO                0x1
  72 #define EFI_CPUID_CACHE_INFO                  0x2
  73 #define EFI_CPUID_SERIAL_NUMBER               0x3
  74 #define EFI_CPUID_EXTENDED_FUNCTION           0x80000000
  75 #define EFI_CPUID_EXTENDED_CPU_SIG            0x80000001
  76 #define EFI_CPUID_BRAND_STRING1               0x80000002
  77 #define EFI_CPUID_BRAND_STRING2               0x80000003
  78 #define EFI_CPUID_BRAND_STRING3               0x80000004
  79
  80 #define EFI_MSR_IA32_PLATFORM_ID              0x17
  81 #define EFI_MSR_IA32_APIC_BASE                0x1B
  82 #define EFI_MSR_EBC_HARD_POWERON              0x2A
  83 #define EFI_MSR_EBC_SOFT_POWERON              0x2B
  84 #define BINIT_DRIVER_DISABLE                  0x40
  85 #define INTERNAL_MCERR_DISABLE                0x20
  86 #define INITIATOR_MCERR_DISABLE               0x10
  87 #define EFI_MSR_EBC_FREQUENCY_ID              0x2C
  88 #define EFI_MSR_IA32_BIOS_UPDT_TRIG           0x79
  89 #define EFI_MSR_IA32_BIOS_SIGN_ID             0x8B
  90 #define EFI_MSR_PSB_CLOCK_STATUS              0xCD
  91 #define EFI_APIC_GLOBAL_ENABLE                0x800
  92 #define EFI_MSR_IA32_MISC_ENABLE              0x1A0
  93 #define LIMIT_CPUID_MAXVAL_ENABLE_BIT         0x00400000
  94 #define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT  0x00000008
  95 #define COMPATIBLE_FPU_OPCODE_ENABLE_BIT      0x00000004
  96 #define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
  97 #define FAST_STRING_ENABLE_BIT                0x00000001
  98
  99 #define EFI_CACHE_VARIABLE_MTRR_BASE          0x200
 100 #define EFI_CACHE_VARIABLE_MTRR_END           0x20F
 101 #define EFI_CACHE_IA32_MTRR_DEF_TYPE          0x2FF
 102 #define EFI_CACHE_MTRR_VALID                  0x800
 103 #define EFI_CACHE_FIXED_MTRR_VALID            0x400
 104 #define EFI_CACHE_VALID_ADDRESS               0xFFFFFF000
 105 #define EFI_MSR_VALID_MASK                    0xFFFFFFFFF
 106 #define EFI_CACHE_VALID_EXTENDED_ADDRESS      0xFFFFFFFFFF000
 107 #define EFI_MSR_VALID_EXTENDED_MASK           0xFFFFFFFFFFFFF
 108
 109 #define EFI_IA32_MTRR_FIX64K_00000            0x250
 110 #define EFI_IA32_MTRR_FIX16K_80000            0x258
 111 #define EFI_IA32_MTRR_FIX16K_A0000            0x259
 112 #define EFI_IA32_MTRR_FIX4K_C0000             0x268
 113 #define EFI_IA32_MTRR_FIX4K_C8000             0x269
 114 #define EFI_IA32_MTRR_FIX4K_D0000             0x26A
 115 #define EFI_IA32_MTRR_FIX4K_D8000             0x26B
 116 #define EFI_IA32_MTRR_FIX4K_E0000             0x26C
 117 #define EFI_IA32_MTRR_FIX4K_E8000             0x26D
 118 #define EFI_IA32_MTRR_FIX4K_F0000             0x26E
 119 #define EFI_IA32_MTRR_FIX4K_F8000             0x26F
 120
 121 #define EFI_IA32_MCG_CAP                      0x179
 122 #define EFI_IA32_MCG_CTL                      0x17B
 123 #define EFI_IA32_MC0_CTL                      0x400
 124 #define EFI_IA32_MC0_STATUS                   0x401
 125
 126 #define EFI_IA32_PERF_STATUS                  0x198
 127 #define EFI_IA32_PERF_CTL                     0x199
 128
 129 #define EFI_CACHE_UNCACHEABLE                 0
 130 #define EFI_CACHE_WRITECOMBINING              1
 131 #define EFI_CACHE_WRITETHROUGH                4
 132 #define EFI_CACHE_WRITEPROTECTED              5
 133 #define EFI_CACHE_WRITEBACK                   6
 134
 135 //
 136 // Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
 137 //
 138 #define EfiMakeCpuVersion(f, m, s)         \
 139   (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
 140
 141 VOID
 142 IA32API
 143 EfiHalt (
 144   VOID
 145   )
 146 ;
 147
 148 /*++
 149 Routine Description:
 150   Halt the Cpu
 151 Arguments:
 152    None
 153 Returns:
 154    None
 155 --*/
 156 VOID
 157 IA32API
 158 EfiWbinvd (
 159   VOID
 160   )
 161 ;
 162
 163 /*++
 164 Routine Description:
 165   Write back and invalidate the Cpu cache
 166 Arguments:
 167    None
 168 Returns:
 169    None
 170 --*/
 171 VOID
 172 IA32API
 173 EfiInvd (
 174   VOID
 175   )
 176 ;
 177
 178 /*++
 179 Routine Description:
 180   Invalidate the Cpu cache
 181 Arguments:
 182    None
 183 Returns:
 184    None
 185 --*/
 186 VOID
 187 IA32API
 188 EfiCpuid (
 189   IN  UINT32                 RegisterInEax,
 190   OUT EFI_CPUID_REGISTER     *Regs
 191   )
 192 ;
 193
 194 /*++
 195 Routine Description:
 196   Get the Cpu info by excute the CPUID instruction
 197 Arguments:
 198    RegisterInEax: -The input value to put into register EAX
 199    Regs:          -The Output value
 200 Returns:
 201    None
 202 --*/
 203
 204 VOID
 205 IA32API
 206 EfiCpuidExt (
 207   IN  UINT32                 RegisterInEax,
 208   IN  UINT32                 CacheLevel,
 209   OUT EFI_CPUID_REGISTER     *Regs
 210   )
 211 /*++
 212 Routine Description:
 213   When RegisterInEax != 4, the functionality is the same as EfiCpuid.
 214   When RegisterInEax == 4, the function return the deterministic cache
 215   parameters by excuting the CPUID instruction
 216 Arguments:
 217    RegisterInEax: - The input value to put into register EAX
 218    CacheLevel:      - The deterministic cache level
 219    Regs:          - The Output value
 220 Returns:
 221    None
 222 --*/
 223 ;
 224
 225 UINT64
 226 IA32API
 227 EfiReadMsr (
 228   IN UINT32     Index
 229   )
 230 ;
 231
 232 /*++
 233 Routine Description:
 234   Read Cpu MSR
 235 Arguments:
 236   Index: -The index value to select the register
 237
 238 Returns:
 239    Return the read data
 240 --*/
 241 VOID
 242 IA32API
 243 EfiWriteMsr (
 244   IN UINT32     Index,
 245   IN UINT64     Value
 246   )
 247 ;
 248
 249 /*++
 250 Routine Description:
 251   Write Cpu MSR
 252 Arguments:
 253   Index: -The index value to select the register
 254   Value: -The value to write to the selected register
 255 Returns:
 256    None
 257 --*/
 258 UINT64
 259 IA32API
 260 EfiReadTsc (
 261   VOID
 262   )
 263 ;
 264
 265 /*++
 266 Routine Description:
 267   Read Time stamp
 268 Arguments:
 269   None
 270 Returns:
 271    Return the read data
 272 --*/
 273 VOID
 274 IA32API
 275 EfiDisableCache (
 276   VOID
 277   )
 278 ;
 279
 280 /*++
 281 Routine Description:
 282   Writing back and invalidate the cache,then diable it
 283 Arguments:
 284   None
 285 Returns:
 286   None
 287 --*/
 288 VOID
 289 IA32API
 290 EfiEnableCache (
 291   VOID
 292   )
 293 ;
 294
 295 /*++
 296 Routine Description:
 297   Invalidate the cache,then Enable it
 298 Arguments:
 299   None
 300 Returns:
 301   None
 302 --*/
 303 UINT32
 304 IA32API
 305 EfiGetEflags (
 306   VOID
 307   )
 308 ;
 309
 310 /*++
 311 Routine Description:
 312   Get Eflags
 313 Arguments:
 314   None
 315 Returns:
 316   Return the Eflags value
 317 --*/
 318 VOID
 319 IA32API
 320 EfiDisableInterrupts (
 321   VOID
 322   )
 323 ;
 324
 325 /*++
 326 Routine Description:
 327   Disable Interrupts
 328 Arguments:
 329   None
 330 Returns:
 331   None
 332 --*/
 333 VOID
 334 IA32API
 335 EfiEnableInterrupts (
 336   VOID
 337   )
 338 ;
 339
 340 /*++
 341 Routine Description:
 342   Enable Interrupts
 343 Arguments:
 344   None
 345 Returns:
 346   None
 347 --*/
 348
 349
 350 VOID
 351 IA32API
 352 EfiCpuVersion (
 353   IN   UINT16  *FamilyId,    OPTIONAL
 354   IN   UINT8   *Model,       OPTIONAL
 355   IN   UINT8   *SteppingId,  OPTIONAL
 356   IN   UINT8   *Processor    OPTIONAL
 357   )
 358 /*++
 359
 360 Routine Description:
 361   Extract CPU detail version infomation
 362
 363 Arguments:
 364   FamilyId   - FamilyId, including ExtendedFamilyId
 365   Model      - Model, including ExtendedModel
 366   SteppingId - SteppingId
 367   Processor  - Processor
 368
 369 --*/
 370 ;
 371
 372 #endif