EdkCompatibilityPkg/Foundation/Include/Ipf/SalApi.h

   1 /*++
   2
   3 Copyright (c) 2004, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   SalApi.h
  15
  16 Abstract:
  17
  18   Main SAL API's defined in SAL 3.0 specification.
  19
  20
  21 Revision History:
  22
  23 --*/
  24
  25 #ifndef _SAL_API_H_
  26 #define _SAL_API_H_
  27
  28 typedef UINTN EFI_SAL_STATUS;
  29
  30 //
  31 // EFI_SAL_STATUS defines
  32 //
  33 #define EFI_SAL_SUCCESS               ((EFI_SAL_STATUS) 0)
  34 #define EFI_SAL_MORE_RECORDS          ((EFI_SAL_STATUS) 3)
  35 #define EFI_SAL_NOT_IMPLEMENTED       ((EFI_SAL_STATUS) - 1)
  36 #define EFI_SAL_INVALID_ARGUMENT      ((EFI_SAL_STATUS) - 2)
  37 #define EFI_SAL_ERROR                 ((EFI_SAL_STATUS) - 3)
  38 #define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
  39 #define EFI_SAL_NO_INFORMATION        ((EFI_SAL_STATUS) - 5)
  40 #define EFI_SAL_NOT_ENOUGH_SCRATCH    ((EFI_SAL_STATUS) - 9)
  41
  42 //
  43 //  Delivery Mode of IPF CPU.
  44 //
  45 typedef enum {
  46   INT,
  47   MPreserved1,
  48   PMI,
  49   MPreserved2,
  50   NMI,
  51   INIT,
  52   MPreserved3,
  53   ExtINT
  54 } EFI_DELIVERY_MODE;
  55
  56 //
  57 //  Return values from SAL
  58 //
  59 typedef struct {
  60   EFI_SAL_STATUS  Status; // register r8
  61   UINTN           r9;
  62   UINTN           r10;
  63   UINTN           r11;
  64 } SAL_RETURN_REGS;
  65
  66 typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
  67   (
  68     IN UINT64 FunctionId,
  69     IN UINT64 Arg2,
  70     IN UINT64 Arg3,
  71     IN UINT64 Arg4,
  72     IN UINT64 Arg5,
  73     IN UINT64 Arg6,
  74     IN UINT64 Arg7,
  75     IN UINT64 Arg8
  76   );
  77
  78 //
  79 // SAL Procedure FunctionId definition
  80 //
  81 #define EFI_SAL_SET_VECTORS             0x01000000
  82 #define EFI_SAL_GET_STATE_INFO          0x01000001
  83 #define EFI_SAL_GET_STATE_INFO_SIZE     0x01000002
  84 #define EFI_SAL_CLEAR_STATE_INFO        0x01000003
  85 #define EFI_SAL_MC_RENDEZ               0x01000004
  86 #define EFI_SAL_MC_SET_PARAMS           0x01000005
  87 #define EFI_SAL_REGISTER_PHYSICAL_ADDR  0x01000006
  88 #define EFI_SAL_CACHE_FLUSH             0x01000008
  89 #define EFI_SAL_CACHE_INIT              0x01000009
  90 #define EFI_SAL_PCI_CONFIG_READ         0x01000010
  91 #define EFI_SAL_PCI_CONFIG_WRITE        0x01000011
  92 #define EFI_SAL_FREQ_BASE               0x01000012
  93 #define EFI_SAL_UPDATE_PAL              0x01000020
  94
  95 #define EFI_SAL_FUNCTION_ID_MASK        0x0000ffff
  96 #define EFI_SAL_MAX_SAL_FUNCTION_ID     0x00000021
  97
  98 //
  99 // SAL Procedure parameter definitions
 100 // Not much point in using typedefs or enums because all params
 101 // are UINT64 and the entry point is common
 102 //
 103 // EFI_SAL_SET_VECTORS
 104 //
 105 #define EFI_SAL_SET_MCA_VECTOR          0x0
 106 #define EFI_SAL_SET_INIT_VECTOR         0x1
 107 #define EFI_SAL_SET_BOOT_RENDEZ_VECTOR  0x2
 108
 109 typedef struct {
 110   UINT64  Length : 32;
 111   UINT64  ChecksumValid : 1;
 112   UINT64  Reserved1 : 7;
 113   UINT64  ByteChecksum : 8;
 114   UINT64  Reserved2 : 16;
 115 } SAL_SET_VECTORS_CS_N;
 116
 117 //
 118 // EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
 119 // EFI_SAL_CLEAR_STATE_INFO
 120 //
 121 #define EFI_SAL_MCA_STATE_INFO  0x0
 122 #define EFI_SAL_INIT_STATE_INFO 0x1
 123 #define EFI_SAL_CMC_STATE_INFO  0x2
 124 #define EFI_SAL_CP_STATE_INFO   0x3
 125
 126 //
 127 // EFI_SAL_MC_SET_PARAMS
 128 //
 129 #define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
 130 #define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
 131 #define EFI_SAL_MC_SET_CPE_PARAM    0x3
 132
 133 #define EFI_SAL_MC_SET_INTR_PARAM   0x1
 134 #define EFI_SAL_MC_SET_MEM_PARAM    0x2
 135
 136 //
 137 // EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
 138 //
 139 #define EFI_SAL_REGISTER_PAL_ADDR 0x0
 140
 141 //
 142 // EFI_SAL_CACHE_FLUSH
 143 //
 144 #define EFI_SAL_FLUSH_I_CACHE       0x01
 145 #define EFI_SAL_FLUSH_D_CACHE       0x02
 146 #define EFI_SAL_FLUSH_BOTH_CACHE    0x03
 147 #define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
 148
 149 //
 150 // EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
 151 //
 152 #define EFI_SAL_PCI_CONFIG_ONE_BYTE   0x1
 153 #define EFI_SAL_PCI_CONFIG_TWO_BYTES  0x2
 154 #define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
 155
 156 typedef struct {
 157   UINT64  Register : 8;
 158   UINT64  Function : 3;
 159   UINT64  Device : 5;
 160   UINT64  Bus : 8;
 161   UINT64  Segment : 8;
 162   UINT64  Reserved : 32;
 163 } SAL_PCI_ADDRESS;
 164
 165 //
 166 // EFI_SAL_FREQ_BASE
 167 //
 168 #define EFI_SAL_CPU_INPUT_FREQ_BASE     0x0
 169 #define EFI_SAL_PLATFORM_IT_FREQ_BASE   0x1
 170 #define EFI_SAL_PLATFORM_RTC_FREQ_BASE  0x2
 171
 172 //
 173 // EFI_SAL_UPDATE_PAL
 174 //
 175 #define EFI_SAL_UPDATE_BAD_PAL_VERSION  ((UINT64) -1)
 176 #define EFI_SAL_UPDATE_PAL_AUTH_FAIL    ((UINT64) -2)
 177 #define EFI_SAL_UPDATE_PAL_BAD_TYPE     ((UINT64) -3)
 178 #define EFI_SAL_UPDATE_PAL_READONLY     ((UINT64) -4)
 179 #define EFI_SAL_UPDATE_PAL_WRITE_FAIL   ((UINT64) -10)
 180 #define EFI_SAL_UPDATE_PAL_ERASE_FAIL   ((UINT64) -11)
 181 #define EFI_SAL_UPDATE_PAL_READ_FAIL    ((UINT64) -12)
 182 #define EFI_SAL_UPDATE_PAL_CANT_FIT     ((UINT64) -13)
 183
 184 typedef struct {
 185   UINT32  Size;
 186   UINT32  MmddyyyyDate;
 187   UINT16  Version;
 188   UINT8   Type;
 189   UINT8   Reserved[5];
 190   UINT64  FwVendorId;
 191 } SAL_UPDATE_PAL_DATA_BLOCK;
 192
 193 typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
 194   struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
 195   struct SAL_UPDATE_PAL_DATA_BLOCK  *DataBlock;
 196   UINT8                             StoreChecksum;
 197   UINT8                             Reserved[15];
 198 } SAL_UPDATE_PAL_INFO_BLOCK;
 199
 200 //
 201 // SAL System Table Definitions
 202 //
 203 #pragma pack(1)
 204 typedef struct {
 205   UINT32  Signature;
 206   UINT32  Length;
 207   UINT16  SalRevision;
 208   UINT16  EntryCount;
 209   UINT8   CheckSum;
 210   UINT8   Reserved[7];
 211   UINT16  SalAVersion;
 212   UINT16  SalBVersion;
 213   UINT8   OemId[32];
 214   UINT8   ProductId[32];
 215   UINT8   Reserved2[8];
 216 } SAL_SYSTEM_TABLE_HEADER;
 217 #pragma pack()
 218
 219 #define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
 220 #define EFI_SAL_REVISION            0x0300
 221 //
 222 // SAL System Types
 223 //
 224 #define EFI_SAL_ST_ENTRY_POINT        0
 225 #define EFI_SAL_ST_MEMORY_DESCRIPTOR  1
 226 #define EFI_SAL_ST_PLATFORM_FEATURES  2
 227 #define EFI_SAL_ST_TR_USAGE           3
 228 #define EFI_SAL_ST_PTC                4
 229 #define EFI_SAL_ST_AP_WAKEUP          5
 230
 231 #pragma pack(1)
 232 typedef struct {
 233   UINT8   Type; //  Type == 0
 234   UINT8   Reserved[7];
 235   UINT64  PalProcEntry;
 236   UINT64  SalProcEntry;
 237   UINT64  SalGlobalDataPointer;
 238   UINT64  Reserved2[2];
 239 } SAL_ST_ENTRY_POINT_DESCRIPTOR;
 240
 241 //
 242 // Not needed for Itanium-based OS boot
 243 //
 244 typedef struct {
 245   UINT8   Type; //  Type == 1
 246   UINT8   NeedVirtualRegistration;
 247   UINT8   MemoryAttributes;
 248   UINT8   PageAccessRights;
 249   UINT8   SupportedAttributes;
 250   UINT8   Reserved;
 251   UINT8   MemoryType;
 252   UINT8   MemoryUsage;
 253   UINT64  PhysicalMemoryAddress;
 254   UINT32  Length;
 255   UINT32  Reserved1;
 256   UINT64  OemReserved;
 257 } SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
 258
 259 #pragma pack()
 260 //
 261 // Memory Attributes
 262 //
 263 #define SAL_MDT_ATTRIB_WB 0x00
 264 //
 265 // #define SAL_MDT_ATTRIB_UC   0x02
 266 //
 267 #define SAL_MDT_ATTRIB_UC   0x04
 268 #define SAL_MDT_ATTRIB_UCE  0x05
 269 #define SAL_MDT_ATTRIB_WC   0x06
 270
 271 //
 272 // Supported memory Attributes
 273 //
 274 #define SAL_MDT_SUPPORT_WB  0x1
 275 #define SAL_MDT_SUPPORT_UC  0x2
 276 #define SAL_MDT_SUPPORT_UCE 0x4
 277 #define SAL_MDT_SUPPORT_WC  0x8
 278
 279 //
 280 // Virtual address registration
 281 //
 282 #define SAL_MDT_NO_VA   0x00
 283 #define SAL_MDT_NEED_VA 0x01
 284 //
 285 // MemoryType info
 286 //
 287 #define SAL_REGULAR_MEMORY  0x0000
 288 #define SAL_MMIO_MAPPING    0x0001
 289 #define SAL_SAPIC_IPI_BLOCK 0x0002
 290 #define SAL_IO_PORT_MAPPING 0x0003
 291 #define SAL_FIRMWARE_MEMORY 0x0004
 292 #define SAL_BLACK_HOLE      0x000A
 293 //
 294 // Memory Usage info
 295 //
 296 #define SAL_MDT_USAGE_UNSPECIFIED 0x00
 297 #define SAL_PAL_CODE              0x01
 298 #define SAL_BOOTSERVICE_CODE      0x02
 299 #define SAL_BOOTSERVICE_DATA      0x03
 300 #define SAL_RUNTIMESERVICE_CODE   0x04
 301 #define SAL_RUNTIMESERVICE_DATA   0x05
 302 #define SAL_IA32_OPTIONROM        0x06
 303 #define SAL_IA32_SYSTEMROM        0x07
 304 #define SAL_PMI_CODE              0x0a
 305 #define SAL_PMI_DATA              0x0b
 306
 307 #pragma pack(1)
 308 typedef struct {
 309   UINT8 Type;                     // Type == 2
 310   UINT8 PlatformFeatures;
 311   UINT8 Reserved[14];
 312 } SAL_ST_PLATFORM_FEATURES;
 313 #pragma pack()
 314
 315 #define SAL_PLAT_FEAT_BUS_LOCK      0x01
 316 #define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
 317 #define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
 318
 319 #pragma pack(1)
 320 typedef struct {
 321   UINT8   Type;                   // Type == 3
 322   UINT8   TRType;
 323   UINT8   TRNumber;
 324   UINT8   Reserved[5];
 325   UINT64  VirtualAddress;
 326   UINT64  EncodedPageSize;
 327   UINT64  Reserved1;
 328 } SAL_ST_TR_DECRIPTOR;
 329 #pragma pack()
 330
 331 #define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
 332 #define EFI_SAL_ST_TR_USAGE_DATA        01
 333
 334 #pragma pack(1)
 335 typedef struct {
 336   UINT64  NumberOfProcessors;
 337   UINT64  LocalIDRegister;
 338 } SAL_COHERENCE_DOMAIN_INFO;
 339 #pragma pack()
 340
 341 #pragma pack(1)
 342 typedef struct {
 343   UINT8                     Type; // Type == 4
 344   UINT8                     Reserved[3];
 345   UINT32                    NumberOfDomains;
 346   SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
 347 } SAL_ST_CACHE_COHERENCE_DECRIPTOR;
 348 #pragma pack()
 349
 350 #pragma pack(1)
 351 typedef struct {
 352   UINT8   Type;                   // Type == 5
 353   UINT8   WakeUpType;
 354   UINT8   Reserved[6];
 355   UINT64  ExternalInterruptVector;
 356 } SAL_ST_AP_WAKEUP_DECRIPTOR;
 357 #pragma pack()
 358 //
 359 // FIT Entry
 360 //
 361 #define EFI_SAL_FIT_ENTRY_PTR   (0x100000000 - 32)  // 4GB - 24
 362 #define EFI_SAL_FIT_PALA_ENTRY  (0x100000000 - 48)  // 4GB - 32
 363 #define EFI_SAL_FIT_PALB_TYPE   01
 364
 365 typedef struct {
 366   UINT64  Address;
 367   UINT8   Size[3];
 368   UINT8   Reserved;
 369   UINT16  Revision;
 370   UINT8   Type : 7;
 371   UINT8   CheckSumValid : 1;
 372   UINT8   CheckSum;
 373 } EFI_SAL_FIT_ENTRY;
 374
 375 //
 376 //  SAL Common Record Header
 377 //
 378 typedef struct {
 379   UINT16  Length;
 380   UINT8   Data[1024];
 381 } SAL_OEM_DATA;
 382
 383 typedef struct {
 384   UINT8 Seconds;
 385   UINT8 Minutes;
 386   UINT8 Hours;
 387   UINT8 Reserved;
 388   UINT8 Day;
 389   UINT8 Month;
 390   UINT8 Year;
 391   UINT8 Century;
 392 } SAL_TIME_STAMP;
 393
 394 typedef struct {
 395   UINT64          RecordId;
 396   UINT16          Revision;
 397   UINT8           ErrorSeverity;
 398   UINT8           ValidationBits;
 399   UINT32          RecordLength;
 400   SAL_TIME_STAMP  TimeStamp;
 401   UINT8           OemPlatformId[16];
 402 } SAL_RECORD_HEADER;
 403
 404 typedef struct {
 405   EFI_GUID  Guid;
 406   UINT16    Revision;
 407   UINT8     ErrorRecoveryInfo;
 408   UINT8     Reserved;
 409   UINT32    SectionLength;
 410 } SAL_SEC_HEADER;
 411
 412 //
 413 // SAL Processor Record
 414 //
 415 #define SAL_PROCESSOR_ERROR_RECORD_INFO \
 416   { \
 417     0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 418   }
 419
 420 #define CHECK_INFO_VALID_BIT_MASK   0x1
 421 #define REQUESTOR_ID_VALID_BIT_MASK 0x2
 422 #define RESPONDER_ID_VALID_BIT_MASK 0x4
 423 #define TARGER_ID_VALID_BIT_MASK    0x8
 424 #define PRECISE_IP_VALID_BIT_MASK   0x10
 425
 426 typedef struct {
 427   UINT64  InfoValid : 1;
 428   UINT64  ReqValid : 1;
 429   UINT64  RespValid : 1;
 430   UINT64  TargetValid : 1;
 431   UINT64  IpValid : 1;
 432   UINT64  Reserved : 59;
 433   UINT64  Info;
 434   UINT64  Req;
 435   UINT64  Resp;
 436   UINT64  Target;
 437   UINT64  Ip;
 438 } MOD_ERROR_INFO;
 439
 440 typedef struct {
 441   UINT8 CpuidInfo[40];
 442   UINT8 Reserved;
 443 } CPUID_INFO;
 444
 445 typedef struct {
 446   UINT64  FrLow;
 447   UINT64  FrHigh;
 448 } FR_STRUCT;
 449
 450 #define MIN_STATE_VALID_BIT_MASK  0x1
 451 #define BR_VALID_BIT_MASK         0x2
 452 #define CR_VALID_BIT_MASK         0x4
 453 #define AR_VALID_BIT_MASK         0x8
 454 #define RR_VALID_BIT_MASK         0x10
 455 #define FR_VALID_BIT_MASK         0x20
 456
 457 typedef struct {
 458   UINT64    ValidFieldBits;
 459   UINT8     MinStateInfo[1024];
 460   UINT64    Br[8];
 461   UINT64    Cr[128];
 462   UINT64    Ar[128];
 463   UINT64    Rr[8];
 464   FR_STRUCT Fr[128];
 465 } PSI_STATIC_STRUCT;
 466
 467 #define PROC_ERROR_MAP_VALID_BIT_MASK       0x1
 468 #define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
 469 #define PROC_CR_LID_VALID_BIT_MASK          0x4
 470 #define PROC_STATIC_STRUCT_VALID_BIT_MASK   0x8
 471 #define CPU_INFO_VALID_BIT_MASK             0x1000000
 472
 473 typedef struct {
 474   SAL_SEC_HEADER    SectionHeader;
 475   UINT64            ValidationBits;
 476   UINT64            ProcErrorMap;
 477   UINT64            ProcStateParameter;
 478   UINT64            ProcCrLid;
 479   MOD_ERROR_INFO    CacheError[15];
 480   MOD_ERROR_INFO    TlbError[15];
 481   MOD_ERROR_INFO    BusError[15];
 482   MOD_ERROR_INFO    RegFileCheck[15];
 483   MOD_ERROR_INFO    MsCheck[15];
 484   CPUID_INFO        CpuInfo;
 485   PSI_STATIC_STRUCT PsiValidData;
 486 } SAL_PROCESSOR_ERROR_RECORD;
 487
 488 //
 489 //  Sal Platform memory Error Record
 490 //
 491 #define SAL_MEMORY_ERROR_RECORD_INFO \
 492   { \
 493     0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 494   }
 495
 496 #define MEMORY_ERROR_STATUS_VALID_BIT_MASK                0x1
 497 #define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK            0x2
 498 #define MEMORY_ADDR_BIT_MASK                              0x4
 499 #define MEMORY_NODE_VALID_BIT_MASK                        0x8
 500 #define MEMORY_CARD_VALID_BIT_MASK                        0x10
 501 #define MEMORY_MODULE_VALID_BIT_MASK                      0x20
 502 #define MEMORY_BANK_VALID_BIT_MASK                        0x40
 503 #define MEMORY_DEVICE_VALID_BIT_MASK                      0x80
 504 #define MEMORY_ROW_VALID_BIT_MASK                         0x100
 505 #define MEMORY_COLUMN_VALID_BIT_MASK                      0x200
 506 #define MEMORY_BIT_POSITION_VALID_BIT_MASK                0x400
 507 #define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK       0x800
 508 #define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK       0x1000
 509 #define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK             0x2000
 510 #define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK  0x4000
 511 #define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK             0x8000
 512 #define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK    0x10000
 513
 514 typedef struct {
 515   SAL_SEC_HEADER  SectionHeader;
 516   UINT64          ValidationBits;
 517   UINT64          MemErrorStatus;
 518   UINT64          MemPhysicalAddress;
 519   UINT64          MemPhysicalAddressMask;
 520   UINT16          MemNode;
 521   UINT16          MemCard;
 522   UINT16          MemModule;
 523   UINT16          MemBank;
 524   UINT16          MemDevice;
 525   UINT16          MemRow;
 526   UINT16          MemColumn;
 527   UINT16          MemBitPosition;
 528   UINT64          ModRequestorId;
 529   UINT64          ModResponderId;
 530   UINT64          ModTargetId;
 531   UINT64          BusSpecificData;
 532   UINT8           MemPlatformOemId[16];
 533 } SAL_MEMORY_ERROR_RECORD;
 534
 535 //
 536 //  PCI BUS Errors
 537 //
 538 #define SAL_PCI_BUS_ERROR_RECORD_INFO \
 539   { \
 540     0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 541   }
 542
 543 #define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK     0x1
 544 #define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK       0x2
 545 #define PCI_BUS_ID_VALID_BIT_MASK               0x4
 546 #define PCI_BUS_ADDRESS_VALID_BIT_MASK          0x8
 547 #define PCI_BUS_DATA_VALID_BIT_MASK             0x10
 548 #define PCI_BUS_CMD_VALID_BIT_MASK              0x20
 549 #define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK     0x40
 550 #define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK     0x80
 551 #define PCI_BUS_TARGET_VALID_BIT_MASK           0x100
 552 #define PCI_BUS_OEM_ID_VALID_BIT_MASK           0x200
 553 #define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK  0x400
 554
 555 typedef enum {
 556   Unknown,
 557   DataParityError,
 558   SystemError,
 559   MasterAbort,
 560   BusTimeout,
 561   MasterDataParityError,
 562   AddressParityError,
 563   CommandParityError
 564 } PCI_BUS_ERROR_TYPE;
 565
 566 typedef struct {
 567   UINT8 BusNumber;
 568   UINT8 SegmentNumber;
 569 } PCI_BUS_ID;
 570
 571 typedef struct {
 572   SAL_SEC_HEADER  SectionHeader;
 573   UINT64          ValidationBits;
 574   UINT64          PciBusErrorStatus;
 575   UINT16          PciBusErrorType;
 576   PCI_BUS_ID      PciBusId;
 577   UINT32          Reserved;
 578   UINT64          PciBusAddress;
 579   UINT64          PciBusData;
 580   UINT64          PciBusCommand;
 581   UINT64          PciBusRequestorId;
 582   UINT64          PciBusResponderId;
 583   UINT64          PciBusTargetId;
 584   UINT8           PciBusOemId[16];
 585 } SAL_PCI_BUS_ERROR_RECORD;
 586
 587 //
 588 //  PCI Component Errors
 589 //
 590 #define SAL_PCI_COMP_ERROR_RECORD_INFO \
 591   { \
 592     0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 593   }
 594
 595 #define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK    0x1
 596 #define PCI_COMP_INFO_VALID_BIT_MASK            0x2
 597 #define PCI_COMP_MEM_NUM_VALID_BIT_MASK         0x4
 598 #define PCI_COMP_IO_NUM_VALID_BIT_MASK          0x8
 599 #define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK   0x10
 600 #define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
 601
 602 typedef struct {
 603   UINT16  VendorId;
 604   UINT16  DeviceId;
 605   UINT8   ClassCode[3];
 606   UINT8   FunctionNumber;
 607   UINT8   DeviceNumber;
 608   UINT8   BusNumber;
 609   UINT8   SegmentNumber;
 610   UINT8   Reserved[5];
 611 } PCI_COMP_INFO;
 612
 613 typedef struct {
 614   SAL_SEC_HEADER  SectionHeader;
 615   UINT64          ValidationBits;
 616   UINT64          PciComponentErrorStatus;
 617   PCI_COMP_INFO   PciComponentInfo;
 618   UINT32          PciComponentMemNum;
 619   UINT32          PciComponentIoNum;
 620   UINT8           PciBusOemId[16];
 621 } SAL_PCI_COMPONENT_ERROR_RECORD;
 622
 623 //
 624 //  Sal Device Errors Info.
 625 //
 626 #define SAL_DEVICE_ERROR_RECORD_INFO \
 627   { \
 628     0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 629   }
 630
 631 #define SEL_RECORD_ID_VALID_BIT_MASK      0x1;
 632 #define SEL_RECORD_TYPE_VALID_BIT_MASK    0x2;
 633 #define SEL_GENERATOR_ID_VALID_BIT_MASK   0x4;
 634 #define SEL_EVM_REV_VALID_BIT_MASK        0x8;
 635 #define SEL_SENSOR_TYPE_VALID_BIT_MASK    0x10;
 636 #define SEL_SENSOR_NUM_VALID_BIT_MASK     0x20;
 637 #define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
 638 #define SEL_EVENT_DATA1_VALID_BIT_MASK    0x80;
 639 #define SEL_EVENT_DATA2_VALID_BIT_MASK    0x100;
 640 #define SEL_EVENT_DATA3_VALID_BIT_MASK    0x200;
 641
 642 typedef struct {
 643   SAL_SEC_HEADER  SectionHeader;
 644   UINT64          ValidationBits;
 645   UINT16          SelRecordId;
 646   UINT8           SelRecordType;
 647   UINT32          TimeStamp;
 648   UINT16          GeneratorId;
 649   UINT8           EvmRevision;
 650   UINT8           SensorType;
 651   UINT8           SensorNum;
 652   UINT8           EventDirType;
 653   UINT8           Data1;
 654   UINT8           Data2;
 655   UINT8           Data3;
 656 } SAL_DEVICE_ERROR_RECORD;
 657
 658 //
 659 //  Sal SMBIOS Device Errors Info.
 660 //
 661 #define SAL_SMBIOS_ERROR_RECORD_INFO \
 662   { \
 663     0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 664   }
 665
 666 #define SMBIOS_EVENT_TYPE_VALID_BIT_MASK  0x1
 667 #define SMBIOS_LENGTH_VALID_BIT_MASK      0x2
 668 #define SMBIOS_TIME_STAMP_VALID_BIT_MASK  0x4
 669 #define SMBIOS_DATA_VALID_BIT_MASK        0x8
 670
 671 typedef struct {
 672   SAL_SEC_HEADER  SectionHeader;
 673   UINT64          ValidationBits;
 674   UINT8           SmbiosEventType;
 675   UINT8           SmbiosLength;
 676   UINT8           SmbiosBcdTimeStamp[6];
 677 } SAL_SMBIOS_DEVICE_ERROR_RECORD;
 678
 679 //
 680 //  Sal Platform Specific Errors Info.
 681 //
 682 #define SAL_PLATFORM_ERROR_RECORD_INFO \
 683   { \
 684     0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 \
 685   }
 686
 687 #define PLATFORM_ERROR_STATUS_VALID_BIT_MASK    0x1
 688 #define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK    0x2
 689 #define PLATFORM_RESPONDER_ID_VALID_BIT_MASK    0x4
 690 #define PLATFORM_TARGET_VALID_BIT_MASK          0x8
 691 #define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK   0x10
 692 #define PLATFORM_OEM_ID_VALID_BIT_MASK          0x20
 693 #define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
 694 #define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
 695
 696 typedef struct {
 697   SAL_SEC_HEADER  SectionHeader;
 698   UINT64          ValidationBits;
 699   UINT64          PlatformErrorStatus;
 700   UINT64          PlatformRequestorId;
 701   UINT64          PlatformResponderId;
 702   UINT64          PlatformTargetId;
 703   UINT64          PlatformBusSpecificData;
 704   UINT8           OemComponentId[16];
 705 } SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
 706
 707 //
 708 // Union of all the possible Sal Record Types
 709 //
 710 typedef union {
 711   SAL_RECORD_HEADER                   *RecordHeader;
 712   SAL_PROCESSOR_ERROR_RECORD          *SalProcessorRecord;
 713   SAL_PCI_BUS_ERROR_RECORD            *SalPciBusRecord;
 714   SAL_PCI_COMPONENT_ERROR_RECORD      *SalPciComponentRecord;
 715   SAL_DEVICE_ERROR_RECORD             *ImpiRecord;
 716   SAL_SMBIOS_DEVICE_ERROR_RECORD      *SmbiosRecord;
 717   SAL_PLATFORM_SPECIFIC_ERROR_RECORD  *PlatformRecord;
 718   SAL_MEMORY_ERROR_RECORD             *MemoryRecord;
 719   UINT8                               *Raw;
 720 } SAL_ERROR_RECORDS_POINTERS;
 721
 722 #pragma pack()
 723
 724 #endif