EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ebc/CpuBreakpoint.c

   1 /*++
   2
   3 Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
   4 This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12
  13 Module Name:
  14
  15   CpuBreakpoint.c
  16
  17 Abstract:
  18
  19
  20 --*/
  21
  22 #include "BaseLibInternals.h"
  23
  24 /**
  25   Generates a breakpoint on the CPU.
  26
  27   Generates a breakpoint on the CPU. The breakpoint must be implemented such
  28   that code can resume normal execution after the breakpoint.
  29
  30 **/
  31 VOID
  32 EFIAPI
  33 CpuBreakpoint (
  34   VOID
  35   )
  36 {
  37   _break (3);
  38 }
  39
  40 /**
  41   Used to serialize load and store operations.
  42
  43   All loads and stores that proceed calls to this function are guaranteed to be
  44   globally visible when this function returns.
  45
  46 **/
  47 VOID
  48 EFIAPI
  49 MemoryFence (
  50   VOID
  51   )
  52 {
  53 }
  54
  55 /**
  56   Disables CPU interrupts.
  57
  58   Disables CPU interrupts.
  59
  60 **/
  61 VOID
  62 EFIAPI
  63 DisableInterrupts (
  64   VOID
  65   )
  66 {
  67   ASSERT (FALSE);
  68 }
  69
  70 /**
  71   Enables CPU interrupts.
  72
  73   Enables CPU interrupts.
  74
  75 **/
  76 VOID
  77 EFIAPI
  78 EnableInterrupts (
  79   VOID
  80   )
  81 {
  82   ASSERT (FALSE);
  83 }
  84
  85 /**
  86   Retrieves the current CPU interrupt state.
  87
  88   Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
  89   currently enabled. Otherwise returns FALSE.
  90
  91   @retval TRUE  CPU interrupts are enabled.
  92   @retval FALSE CPU interrupts are disabled.
  93
  94 **/
  95 BOOLEAN
  96 EFIAPI
  97 GlueGetInterruptState (
  98   VOID
  99   )
 100 {
 101   ASSERT (FALSE);
 102   return FALSE;
 103 }
 104
 105 /**
 106   Enables CPU interrupts for the smallest window required to capture any
 107   pending interrupts.
 108
 109   Enables CPU interrupts for the smallest window required to capture any
 110   pending interrupts.
 111
 112 **/
 113 VOID
 114 EFIAPI
 115 EnableDisableInterrupts (
 116   VOID
 117   )
 118 {
 119   EnableInterrupts ();
 120   DisableInterrupts ();
 121 }
 122
 123 /**
 124   Requests CPU to pause for a short period of time.
 125
 126   Requests CPU to pause for a short period of time. Typically used in MP
 127   systems to prevent memory starvation while waiting for a spin lock.
 128
 129 **/
 130 VOID
 131 EFIAPI
 132 CpuPause (
 133   VOID
 134   )
 135 {
 136 }
 137
 138 /**
 139   Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
 140
 141   Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
 142
 143 **/
 144 VOID
 145 EFIAPI
 146 CpuFlushTlb (
 147   VOID
 148   )
 149 {
 150   ASSERT (FALSE);
 151 }
 152
 153 /**
 154   Places the CPU in a sleep state until an interrupt is received.
 155
 156   Places the CPU in a sleep state until an interrupt is received. If interrupts
 157   are disabled prior to calling this function, then the CPU will be placed in a
 158   sleep state indefinitely.
 159
 160 **/
 161 VOID
 162 EFIAPI
 163 CpuSleep (
 164   VOID
 165   )
 166 {
 167 }