EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/RShiftU64.S

   1 #/*++
   2 #
   3 #Copyright (c) 2006, Intel Corporation
   4 #All rights reserved. This program and the accompanying materials
   5 #are licensed and made available under the terms and conditions of the BSD License
   6 #which accompanies this distribution.  The full text of the license may be found at
   7 #http://opensource.org/licenses/bsd-license.php
   8 #
   9 #THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 #WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 #Module Name:
  13 #
  14 #  RShiftU64.c
  15 #
  16 #Abstract:
  17 #
  18 #  64-bit right shift function for IA-32
  19 #
  20 #--*/
  21 #
  22 ##include "Tiano.h"
  23 #
  24 #include "EfiBind.h"
  25 #---------------------------------------------------------------------------
  26     .686:
  27     #.MODEL flat,C
  28     .code:
  29
  30 #---------------------------------------------------------------------------
  31 .globl ASM_PFX(RShiftU64)
  32 #UINT64
  33 #RShiftU64 (
  34 #  IN UINT64   Operand,
  35 #  IN UINTN    Count
  36 #  )
  37 #/*++
  38 #
  39 #Routine Description:
  40 #  This routine allows a 64 bit value to be right shifted by 32 bits and returns the
  41 #  shifted value.
  42 #  Count is valid up 63. (Only Bits 0-5 is valid for Count)
  43 #Arguments:
  44 #  Operand - Value to be shifted
  45 #  Count   - Number of times to shift right.
  46 #
  47 #Returns:
  48 #
  49 #  Value shifted right identified by the Count.
  50 #
  51 #--*/
  52 ASM_PFX(RShiftU64):
  53
  54     movl   4(%esp), %eax # dword ptr Operand[0]
  55     movl   8(%esp), %edx # dword ptr Operand[4]
  56
  57     #
  58     # CL is valid from 0 - 31. shld will move EDX:EAX by CL times but EDX is not touched
  59     # For CL of 32 - 63, it will be shifted 0 - 31 so we will move edx to eax later.
  60     #
  61     movl   0xC(%esp), %ecx  # Count
  62     andl   $63, %ecx
  63     shrd   %cl, %edx, %eax
  64     shrb   %cl, %edx
  65
  66     cmpl   $32, %ecx
  67     jc     _RShiftU64_Done
  68
  69     #
  70     # Since Count is 32 - 63, edx will have been shifted  by 0 - 31
  71     # If shifted by 32 or more, set upper 32 bits to zero.
  72     #
  73     movl   %edx, %eax
  74     xorl   %edx, %edx
  75
  76 _RShiftU64_Done:
  77
  78     ret
  79 #RShiftU64 ENDP
  80