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Add in the 1st version of ECP.
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1 /*++
2
3 Copyright (c) 2004, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 misc.c
15
16 Abstract:
17
18 --*/
19
20 #include "Tiano.h"
21 #include "pei.h"
22 #include "cpuio.h"
23 #include "pcicfg.h"
24 #include "pcicfg2.h"
25 #include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo)
26
27 //
28 // Modular variable used by common libiary in PEI phase
29 //
30 EFI_GUID mPeiCpuIoPpiGuid = PEI_CPU_IO_PPI_GUID;
31 #if (PI_SPECIFICATION_VERSION < 0x00010000)
32 EFI_GUID mPeiPciCfgPpiGuid = PEI_PCI_CFG_PPI_GUID;
33 PEI_PCI_CFG_PPI *PciCfgPpi = NULL;
34 #else
35 EFI_GUID mPeiPciCfgPpiGuid = EFI_PEI_PCI_CFG2_PPI_GUID;
36 EFI_PEI_PCI_CFG2_PPI *PciCfgPpi = NULL;
37 #endif
38 EFI_PEI_SERVICES **mPeiServices = NULL;
39 PEI_CPU_IO_PPI *CpuIoPpi = NULL;
40
41 //
42 // Modular variable used by common libiary in DXE phase
43 //
44 EFI_SYSTEM_TABLE *mST = NULL;
45 EFI_BOOT_SERVICES *mBS = NULL;
46 EFI_RUNTIME_SERVICES *mRT = NULL;
47
48 EFI_STATUS
49 EfiInitializeCommonDriverLib (
50 IN EFI_HANDLE ImageHandle,
51 IN VOID *SystemTable
52 )
53 /*++
54
55 Routine Description:
56
57 Initialize lib function calling phase: PEI or DXE
58
59 Arguments:
60
61 ImageHandle - The firmware allocated handle for the EFI image.
62
63 SystemTable - A pointer to the EFI System Table.
64
65 Returns:
66
67 EFI_STATUS always returns EFI_SUCCESS
68
69 --*/
70 {
71 EFI_STATUS Status;
72
73 mPeiServices = NULL;
74 CpuIoPpi = NULL;
75 PciCfgPpi = NULL;
76
77 if (ImageHandle == NULL) {
78 //
79 // The function is called in PEI phase, use PEI interfaces
80 //
81 mPeiServices = (EFI_PEI_SERVICES **) SystemTable;
82 ASSERT (mPeiServices == NULL);
83
84 CpuIoPpi = (**mPeiServices).CpuIo;
85 PciCfgPpi = (**mPeiServices).PciCfg;
86
87 } else {
88 //
89 // ImageHandle is not NULL. The function is called in DXE phase
90 //
91 mST = SystemTable;
92 ASSERT (mST != NULL);
93
94 mBS = mST->BootServices;
95 mRT = mST->RuntimeServices;
96 ASSERT (mBS != NULL);
97 ASSERT (mRT != NULL);
98
99 //
100 // Should be at EFI_D_INFO, but lets us know things are running
101 //
102 DEBUG ((EFI_D_INFO, "EfiInitializeCommonDriverLib: Started in DXE\n"));
103 return EFI_SUCCESS;
104 }
105
106 return EFI_SUCCESS;
107 }
108
109
110 EFI_STATUS
111 EfiCommonIoWrite (
112 IN UINT8 Width,
113 IN UINTN Address,
114 IN UINTN Count,
115 IN OUT VOID *Buffer
116 )
117 /*++
118
119 Routine Description:
120
121 Io write operation.
122
123 Arguments:
124
125 Width - Width of write operation
126 Address - Start IO address to write
127 Count - Write count
128 Buffer - Buffer to write to the address
129
130 Returns:
131
132 Status code
133
134 --*/
135 {
136 EFI_STATUS Status;
137 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;
138
139 if (mPeiServices == NULL) {
140 //
141 // The function is called in PEI phase, use PEI interfaces
142 //
143 Status = CpuIoPpi->Io.Write (
144 mPeiServices,
145 CpuIoPpi,
146 Width,
147 Address,
148 Count,
149 Buffer
150 );
151 } else {
152 //
153 // The function is called in DXE phase
154 //
155 Status = mBS->LocateProtocol (
156 &gEfiPciRootBridgeIoProtocolGuid,
157 NULL,
158 (VOID **) &RootBridgeIo
159 );
160 if (EFI_ERROR (Status)) {
161 return Status;
162 }
163
164 Status = RootBridgeIo->Io.Write (RootBridgeIo, Width, Address, Count, Buffer);
165 }
166
167 return Status;
168 }
169
170
171 EFI_STATUS
172 EfiCommonIoRead (
173 IN UINT8 Width,
174 IN UINTN Address,
175 IN UINTN Count,
176 IN OUT VOID *Buffer
177 )
178 /*++
179
180 Routine Description:
181
182 Io read operation.
183
184 Arguments:
185
186 Width - Width of read operation
187 Address - Start IO address to read
188 Count - Read count
189 Buffer - Buffer to store result
190
191 Returns:
192
193 Status code
194
195 --*/
196 {
197 EFI_STATUS Status;
198 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;
199
200 if (mPeiServices == NULL) {
201 //
202 // The function is called in PEI phase, use PEI interfaces
203 //
204 Status = CpuIoPpi->Io.Read (
205 mPeiServices,
206 CpuIoPpi,
207 Width,
208 Address,
209 Count,
210 Buffer
211 );
212 } else {
213 //
214 // The function is called in DXE phase
215 //
216 Status = mBS->LocateProtocol (
217 &gEfiPciRootBridgeIoProtocolGuid,
218 NULL,
219 (VOID **) &RootBridgeIo
220 );
221 if (EFI_ERROR (Status)) {
222 return Status;
223 }
224
225 Status = RootBridgeIo->Io.Read (RootBridgeIo, Width, Address, Count, Buffer);
226 }
227
228 return Status;
229 }
230
231
232 EFI_STATUS
233 EfiCommonPciWrite (
234 IN UINT8 Width,
235 IN UINT64 Address,
236 IN UINTN Count,
237 IN OUT VOID *Buffer
238 )
239 /*++
240
241 Routine Description:
242
243 Pci write operation
244
245 Arguments:
246
247 Width - Width of PCI write
248 Address - PCI address to write
249 Count - Write count
250 Buffer - Buffer to write to the address
251
252 Returns:
253
254 Status code
255
256 --*/
257 {
258 EFI_STATUS Status;
259 UINTN Index;
260 UINT8 *Buffer8;
261 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;
262
263 if (mPeiServices == NULL) {
264 //
265 // The function is called in PEI phase, use PEI interfaces
266 //
267 Buffer8 = Buffer;
268 for (Index = 0; Index < Count; Index++) {
269 Status = PciCfgPpi->Write (
270 mPeiServices,
271 PciCfgPpi,
272 Width,
273 Address,
274 Buffer8
275 );
276
277 if (EFI_ERROR (Status)) {
278 return Status;
279 }
280
281 Buffer8 += Width;
282 }
283
284 } else {
285 //
286 // The function is called in DXE phase
287 //
288 Status = mBS->LocateProtocol (
289 &gEfiPciRootBridgeIoProtocolGuid,
290 NULL,
291 (VOID **) &RootBridgeIo
292 );
293 if (EFI_ERROR (Status)) {
294 return Status;
295 }
296
297 Status = RootBridgeIo->Pci.Write (
298 RootBridgeIo,
299 Width,
300 Address,
301 Count,
302 Buffer
303 );
304 }
305
306 return EFI_SUCCESS;
307 }
308
309 EFI_STATUS
310 EfiCommonPciRead (
311 IN UINT8 Width,
312 IN UINT64 Address,
313 IN UINTN Count,
314 IN OUT VOID *Buffer
315 )
316 /*++
317
318 Routine Description:
319
320 Pci read operation
321
322 Arguments:
323
324 Width - Width of PCI read
325 Address - PCI address to read
326 Count - Read count
327 Buffer - Output buffer for the read
328
329 Returns:
330
331 Status code
332
333 --*/
334 {
335 EFI_STATUS Status;
336 UINTN Index;
337 UINT8 *Buffer8;
338 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;
339
340 if (mPeiServices == NULL) {
341 //
342 // The function is called in PEI phase, use PEI interfaces
343 //
344 Buffer8 = Buffer;
345 for (Index = 0; Index < Count; Index++) {
346 Status = PciCfgPpi->Read (
347 mPeiServices,
348 PciCfgPpi,
349 Width,
350 Address,
351 Buffer8
352 );
353
354 if (EFI_ERROR (Status)) {
355 return Status;
356 }
357
358 Buffer8 += Width;
359 }
360
361 } else {
362 //
363 // The function is called in DXE phase
364 //
365 Status = mBS->LocateProtocol (
366 &gEfiPciRootBridgeIoProtocolGuid,
367 NULL,
368 (VOID **) &RootBridgeIo
369 );
370 if (EFI_ERROR (Status)) {
371 return Status;
372 }
373
374 Status = RootBridgeIo->Pci.Read (
375 RootBridgeIo,
376 Width,
377 Address,
378 Count,
379 Buffer
380 );
381 }
382
383 return EFI_SUCCESS;
384 }