EdkModulePkg/Bus/Pci/Ehci/Dxe/Ehci.h

   1 /*++
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14     Ehci.h
  15
  16 Abstract:
  17
  18
  19 Revision History
  20 --*/
  21
  22 #ifndef _EHCI_H
  23 #define _EHCI_H
  24
  25 //
  26 // Universal Host Controller Interface data structures and defines
  27 //
  28 #include <IndustryStandard/pci22.h>
  29
  30
  31 extern UINTN  gEHCDebugLevel;
  32 extern UINTN  gEHCErrorLevel;
  33
  34
  35 #define STALL_1_MACRO_SECOND              1
  36 #define STALL_1_MILLI_SECOND              1000 * STALL_1_MACRO_SECOND
  37 #define STALL_1_SECOND                    1000 * STALL_1_MILLI_SECOND
  38
  39 #define SETUP_PACKET_PID_CODE             0x02
  40 #define INPUT_PACKET_PID_CODE             0x01
  41 #define OUTPUT_PACKET_PID_CODE            0x0
  42
  43 #define ITD_SELECT_TYPE                   0x0
  44 #define QH_SELECT_TYPE                    0x01
  45 #define SITD_SELECT_TYPE                  0x02
  46 #define FSTN_SELECT_TYPE                  0x03
  47
  48 #define EHCI_SET_PORT_RESET_RECOVERY_TIME     50 * STALL_1_MILLI_SECOND
  49 #define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME   STALL_1_MILLI_SECOND
  50 #define EHCI_GENERIC_TIMEOUT                  50 * STALL_1_MILLI_SECOND
  51 #define EHCI_GENERIC_RECOVERY_TIME            50 * STALL_1_MACRO_SECOND
  52 #define EHCI_SYNC_REQUEST_POLLING_TIME        50 * STALL_1_MACRO_SECOND
  53 #define EHCI_ASYNC_REQUEST_POLLING_TIME       50 * STALL_1_MILLI_SECOND
  54
  55 #define USB_BAR_INDEX                     0 /* how many bytes away from USB_BASE to 0x10 */
  56
  57 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1
  58
  59 #define EHCI_MIN_PACKET_SIZE              8
  60 #define EHCI_MAX_PACKET_SIZE              1024
  61 #define EHCI_MAX_FRAME_LIST_LENGTH        1024
  62 #define EHCI_BLOCK_SIZE_WITH_TT           64
  63 #define EHCI_BLOCK_SIZE                   512
  64 #define EHCI_MAX_QTD_CAPACITY             (EFI_PAGE_SIZE * 5)
  65
  66 #define NAK_COUNT_RELOAD                  3
  67 #define QTD_ERROR_COUNTER                 1
  68 #define HIGH_BANDWIDTH_PIPE_MULTIPLIER    1
  69
  70 #define QTD_STATUS_ACTIVE                 0x80
  71 #define QTD_STATUS_HALTED                 0x40
  72 #define QTD_STATUS_BUFFER_ERR             0x20
  73 #define QTD_STATUS_BABBLE_ERR             0x10
  74 #define QTD_STATUS_TRANSACTION_ERR        0x08
  75 #define QTD_STATUS_DO_STOP_SPLIT          0x02
  76 #define QTD_STATUS_DO_START_SPLIT         0
  77 #define QTD_STATUS_DO_PING                0x01
  78 #define QTD_STATUS_DO_OUT                 0
  79
  80 #define DATA0                             0
  81 #define DATA1                             1
  82
  83 #define MICRO_FRAME_0_CHANNEL             0x01
  84 #define MICRO_FRAME_1_CHANNEL             0x02
  85 #define MICRO_FRAME_2_CHANNEL             0x04
  86 #define MICRO_FRAME_3_CHANNEL             0x08
  87 #define MICRO_FRAME_4_CHANNEL             0x10
  88 #define MICRO_FRAME_5_CHANNEL             0x20
  89 #define MICRO_FRAME_6_CHANNEL             0x40
  90 #define MICRO_FRAME_7_CHANNEL             0x80
  91
  92 #define CONTROL_TRANSFER                  0x01
  93 #define BULK_TRANSFER                     0x02
  94 #define SYNC_INTERRUPT_TRANSFER           0x04
  95 #define ASYNC_INTERRUPT_TRANSFER          0x08
  96 #define SYNC_ISOCHRONOUS_TRANSFER         0x10
  97 #define ASYNC_ISOCHRONOUS_TRANSFER        0x20
  98
  99
 100 //
 101 // Enhanced Host Controller Registers definitions
 102 //
 103 extern UINT32                       mUsbCapabilityLen;
 104 extern EFI_DRIVER_BINDING_PROTOCOL  gEhciDriverBinding;
 105 extern EFI_COMPONENT_NAME_PROTOCOL  gEhciComponentName;
 106
 107 #define USBCMD            0x0     /* Command Register Offset 00-03h */
 108 #define USBCMD_RS         0x01    /* Run / Stop */
 109 #define USBCMD_HCRESET    0x02    /* Host controller reset */
 110 #define USBCMD_FLS_512    0x04    /* 512 elements (2048bytes) in Frame List */
 111 #define USBCMD_FLS_256    0x08    /* 256 elements (1024bytes) in Frame List */
 112 #define USBCMD_PSE        0x10    /* Periodic schedule enable */
 113 #define USBCMD_ASE        0x20    /* Asynchronous schedule enable */
 114 #define USBCMD_IAAD       0x40    /* Interrupt on async advance doorbell */
 115
 116 #define USBSTS            0x04    /* Statue Register Offset 04-07h */
 117 #define USBSTS_HSE        0x10    /* Host system error */
 118 #define USBSTS_IAA        0x20    /* Interrupt on async advance */
 119 #define USBSTS_HCH        0x1000  /* Host controller halted */
 120 #define USBSTS_PSS        0x4000  /* Periodic schedule status */
 121 #define USBSTS_ASS        0x8000  /* Asynchronous schedule status */
 122
 123 #define USBINTR           0x08    /* Command Register Offset 08-0bh */
 124
 125 #define FRINDEX           0x0c    /* Frame Index Offset 0c-0fh */
 126
 127 #define CTRLDSSGMENT      0x10    /* 4G Segment Selector Offset 10-13h */
 128
 129 #define PERIODICLISTBASE  0x14    /* Frame List Base Address Offset 14-17h */
 130
 131 #define ASYNCLISTADDR     0x18    /* Next Asynchronous List Address Offset 18-1bh */
 132
 133 #define CONFIGFLAG        0x40    /* Configured Flag Register Offset 40-43h */
 134 #define CONFIGFLAG_CF     0x01    /* Configure Flag */
 135
 136 #define PORTSC            0x44    /* Port Status/Control Offset 44-47h */
 137 #define PORTSC_CCS        0x01    /* Current Connect Status*/
 138 #define PORTSC_CSC        0x02    /* Connect Status Change */
 139 #define PORTSC_PED        0x04    /* Port Enable / Disable */
 140 #define PORTSC_PEDC       0x08    /* Port Enable / Disable Change */
 141 #define PORTSC_OCA        0x10    /* Over current Active */
 142 #define PORTSC_OCC        0x20    /* Over current Change */
 143 #define PORTSC_FPR        0x40    /* Force Port Resume */
 144 #define PORTSC_SUSP       0x80    /* Port Suspend State */
 145 #define PORTSC_PR         0x100   /* Port Reset */
 146 #define PORTSC_LS_KSTATE  0x400   /* Line Status K-state */
 147 #define PORTSC_LS_JSTATE  0x800   /* Line Status J-state */
 148 #define PORTSC_PP         0x1000  /* Port Power */
 149 #define PORTSC_PO         0x2000  /* Port Owner */
 150
 151 #define CAPLENGTH         0       /* Capability Register Length 00h */
 152
 153 #define HCIVERSION        0x02    /* Interface Version Number  02-03h */
 154
 155 #define HCSPARAMS         0x04    /* Structural Parameters 04-07h */
 156 #define HCSP_NPORTS       0x0f    /* Number of physical downstream ports on host controller */
 157
 158 #define HCCPARAMS         0x08    /* Capability Parameters 08-0bh */
 159 #define HCCP_64BIT        0x01    /* 64-bit Addressing Capability */
 160 #define HCCP_PFLF         0x02    /* Programmable Frame List Flag */
 161 #define HCCP_EECP         0xff00  /* EHCI Extemded Capabilities Pointer */
 162
 163 #define HCSPPORTROUTE     0x0c    /* Companion Port Route Description 60b */
 164
 165 #define CLASSC            0x09    /* Class Code 09-0bh */
 166
 167 #define USBBASE           0x10    /* Base Address to Memory-mapped Host Controller Register Space 10-13h */
 168
 169 #define SBRN              0x60    /* Serial Bus Release Number 60h */
 170
 171 #define FLADJ             0x61    /* Frame Length Adjustment Register 61h */
 172
 173 #define PORTWAKECAP       0x62    /* Port wake capablilities register(OPIONAL)  61-62h */
 174
 175 //
 176 // PCI Configuration Registers
 177 //
 178 #define EHCI_PCI_CLASSC         0x09
 179 #define EHCI_PCI_MEMORY_BASE    0x10
 180
 181 //
 182 // Memory Offset Registers
 183 //
 184 #define EHCI_MEMORY_CAPLENGTH   0x0
 185 #define EHCI_MEMORY_CONFIGFLAG  0x40
 186
 187 //
 188 // USB Base Class Code,Sub-Class Code and Programming Interface
 189 //
 190 #define PCI_CLASSC_PI_EHCI      0x20
 191
 192 #define SETUP_PACKET_ID         0x2D
 193 #define INPUT_PACKET_ID         0x69
 194 #define OUTPUT_PACKET_ID        0xE1
 195 #define ERROR_PACKET_ID         0x55
 196
 197 #define bit(a)                  (1 << (a))
 198
 199 #define GET_0B_TO_31B(Addr)     (((UINTN) Addr) & (0xffffffff))
 200 #define GET_32B_TO_63B(Addr)    ((UINTN)RShiftU64((UINTN) Addr, 32) & (0xffffffff))
 201
 202
 203 //
 204 // Ehci Data and Ctrl Structures
 205 //
 206 #pragma pack(1)
 207
 208 typedef struct {
 209   UINT8 PI;
 210   UINT8 SubClassCode;
 211   UINT8 BaseCode;
 212 } USB_CLASSC;
 213
 214 typedef struct {
 215   UINT32  NextQtdTerminate : 1;
 216   UINT32  Rsvd1 : 4;
 217   UINT32  NextQtdPointer : 27;
 218
 219   UINT32  AltNextQtdTerminate : 1;
 220   UINT32  Rsvd2 : 4;
 221   UINT32  AltNextQtdPointer : 27;
 222
 223   UINT32  Status : 8;
 224   UINT32  PidCode : 2;
 225   UINT32  ErrorCount : 2;
 226   UINT32  CurrentPage : 3;
 227   UINT32  InterruptOnComplete : 1;
 228   UINT32  TotalBytes : 15;
 229   UINT32  DataToggle : 1;
 230
 231   UINT32  CurrentOffset : 12;
 232   UINT32  BufferPointer0 : 20;
 233
 234   UINT32  Rsvd3 : 12;
 235   UINT32  BufferPointer1 : 20;
 236
 237   UINT32  Rsvd4 : 12;
 238   UINT32  BufferPointer2 : 20;
 239
 240   UINT32  Rsvd5 : 12;
 241   UINT32  BufferPointer3 : 20;
 242
 243   UINT32  Rsvd6 : 12;
 244   UINT32  BufferPointer4 : 20;
 245
 246   UINT32  ExtBufferPointer0;
 247   UINT32  ExtBufferPointer1;
 248   UINT32  ExtBufferPointer2;
 249   UINT32  ExtBufferPointer3;
 250   UINT32  ExtBufferPointer4;
 251 } EHCI_QTD_HW;
 252
 253 typedef struct {
 254   UINT32  QhTerminate : 1;
 255   UINT32  SelectType : 2;
 256   UINT32  Rsvd1 : 2;
 257   UINT32  QhHorizontalPointer : 27;
 258
 259   UINT32  DeviceAddr : 7;
 260   UINT32  Inactive : 1;
 261   UINT32  EndpointNum : 4;
 262   UINT32  EndpointSpeed : 2;
 263   UINT32  DataToggleControl : 1;
 264   UINT32  HeadReclamationFlag : 1;
 265   UINT32  MaxPacketLen : 11;
 266   UINT32  ControlEndpointFlag : 1;
 267   UINT32  NakCountReload : 4;
 268
 269   UINT32  InerruptScheduleMask : 8;
 270   UINT32  SplitComletionMask : 8;
 271   UINT32  HubAddr : 7;
 272   UINT32  PortNum : 7;
 273   UINT32  Multiplier : 2;
 274
 275   UINT32  Rsvd2 : 5;
 276   UINT32  CurrentQtdPointer : 27;
 277
 278   UINT32  NextQtdTerminate : 1;
 279   UINT32  Rsvd3 : 4;
 280   UINT32  NextQtdPointer : 27;
 281
 282   UINT32  AltNextQtdTerminate : 1;
 283   UINT32  NakCount : 4;
 284   UINT32  AltNextQtdPointer : 27;
 285
 286   UINT32  Status : 8;
 287   UINT32  PidCode : 2;
 288   UINT32  ErrorCount : 2;
 289   UINT32  CurrentPage : 3;
 290   UINT32  InterruptOnComplete : 1;
 291   UINT32  TotalBytes : 15;
 292   UINT32  DataToggle : 1;
 293
 294   UINT32  CurrentOffset : 12;
 295   UINT32  BufferPointer0 : 20;
 296
 297   UINT32  CompleteSplitMask : 8;
 298   UINT32  Rsvd4 : 4;
 299   UINT32  BufferPointer1 : 20;
 300
 301   UINT32  FrameTag : 5;
 302   UINT32  SplitBytes : 7;
 303   UINT32  BufferPointer2 : 20;
 304
 305   UINT32  Rsvd5 : 12;
 306   UINT32  BufferPointer3 : 20;
 307
 308   UINT32  Rsvd6 : 12;
 309   UINT32  BufferPointer4 : 20;
 310
 311   UINT32  ExtBufferPointer0;
 312   UINT32  ExtBufferPointer1;
 313   UINT32  ExtBufferPointer2;
 314   UINT32  ExtBufferPointer3;
 315   UINT32  ExtBufferPointer4;
 316 } EHCI_QH_HW;
 317
 318 typedef struct {
 319   UINT32  LinkTerminate : 1;
 320   UINT32  SelectType : 2;
 321   UINT32  Rsvd : 2;
 322   UINT32  LinkPointer : 27;
 323 } FRAME_LIST_ENTRY;
 324
 325 #pragma pack()
 326
 327 typedef struct _EHCI_QTD_ENTITY     EHCI_QTD_ENTITY;
 328 typedef struct _EHCI_QH_ENTITY      EHCI_QH_ENTITY;
 329 typedef struct _EHCI_ASYNC_REQUEST  EHCI_ASYNC_REQUEST;
 330
 331 struct _EHCI_QTD_ENTITY {
 332   EHCI_QTD_HW     Qtd;
 333   UINT32          TotalBytes;
 334   UINT32          StaticTotalBytes;
 335   UINT32          StaticCurrentOffset;
 336   EHCI_QTD_ENTITY *Prev;
 337   EHCI_QTD_ENTITY *Next;
 338   EHCI_QTD_ENTITY *AltNext;
 339   EHCI_QH_ENTITY  *SelfQh;
 340 };
 341
 342 struct _EHCI_QH_ENTITY {
 343   EHCI_QH_HW      Qh;
 344   EHCI_QH_ENTITY  *Next;
 345   EHCI_QH_ENTITY  *Prev;
 346   EHCI_QTD_ENTITY *FirstQtdPtr;
 347   EHCI_QTD_ENTITY *LastQtdPtr;
 348   EHCI_QTD_ENTITY *AltQtdPtr;
 349   UINTN           Interval;
 350   UINT8           TransferType;
 351 };
 352
 353 #define GET_QH_ENTITY_ADDR(a)   ((EHCI_QH_ENTITY *) a)
 354 #define GET_QTD_ENTITY_ADDR(a)  ((EHCI_QTD_ENTITY *) a)
 355
 356
 357 //
 358 // Ehci Managment Structures
 359 //
 360 #define USB2_HC_DEV_FROM_THIS(a)  CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
 361
 362 #define USB2_HC_DEV_SIGNATURE     EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
 363
 364 struct _EHCI_ASYNC_REQUEST {
 365   UINT8                           TransferType;
 366   EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc;
 367   VOID                            *Context;
 368   EHCI_ASYNC_REQUEST              *Prev;
 369   EHCI_ASYNC_REQUEST              *Next;
 370   EHCI_QH_ENTITY                  *QhPtr;
 371 };
 372
 373 typedef struct _MEMORY_MANAGE_HEADER {
 374   UINT8                         *BitArrayPtr;
 375   UINTN                         BitArraySizeInBytes;
 376   UINT8                         *MemoryBlockPtr;
 377   UINTN                         MemoryBlockSizeInBytes;
 378   VOID                          *Mapping;
 379   struct _MEMORY_MANAGE_HEADER  *Next;
 380 } MEMORY_MANAGE_HEADER;
 381
 382 typedef struct _USB2_HC_DEV {
 383   UINTN                     Signature;
 384   EFI_PCI_IO_PROTOCOL       *PciIo;
 385   EFI_USB2_HC_PROTOCOL      Usb2Hc;
 386   UINTN                     PeriodicFrameListLength;
 387   VOID                      *PeriodicFrameListBuffer;
 388   VOID                      *PeriodicFrameListMap;
 389   VOID                      *AsyncList;
 390   EHCI_ASYNC_REQUEST        *AsyncRequestList;
 391   EFI_EVENT                 AsyncRequestEvent;
 392   EFI_UNICODE_STRING_TABLE  *ControllerNameTable;
 393   MEMORY_MANAGE_HEADER      *MemoryHeader;
 394   UINT8                                         Is64BitCapable;
 395   UINT32                    High32BitAddr;
 396 } USB2_HC_DEV;
 397
 398
 399 //
 400 // Internal Functions Declaration
 401 //
 402
 403 //
 404 // EhciMem Functions
 405 //
 406 EFI_STATUS
 407 CreateMemoryBlock (
 408   IN  USB2_HC_DEV               *HcDev,
 409   OUT MEMORY_MANAGE_HEADER      **MemoryHeader,
 410   IN  UINTN                     MemoryBlockSizeInPages
 411   )
 412 /*++
 413
 414 Routine Description:
 415
 416   Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
 417   and use PciIo->Map to map the common buffer for Bus Master Read/Write.
 418
 419 Arguments:
 420
 421   HcDev                  - USB2_HC_DEV
 422   MemoryHeader           - MEMORY_MANAGE_HEADER to output
 423   MemoryBlockSizeInPages - MemoryBlockSizeInPages
 424
 425 Returns:
 426
 427   EFI_SUCCESS           Success
 428   EFI_OUT_OF_RESOURCES  Fail for no resources
 429   EFI_UNSUPPORTED       Unsupported currently
 430
 431 --*/
 432 ;
 433
 434 EFI_STATUS
 435 FreeMemoryHeader (
 436   IN USB2_HC_DEV               *HcDev,
 437   IN MEMORY_MANAGE_HEADER      *MemoryHeader
 438   )
 439 /*++
 440
 441 Routine Description:
 442
 443   Free Memory Header
 444
 445 Arguments:
 446
 447   HcDev         - USB2_HC_DEV
 448   MemoryHeader  - MemoryHeader to be freed
 449
 450 Returns:
 451
 452   EFI_SUCCESS            Success
 453   EFI_INVALID_PARAMETER  Parameter is error
 454
 455 --*/
 456 ;
 457
 458 VOID
 459 InsertMemoryHeaderToList (
 460   IN MEMORY_MANAGE_HEADER     *MemoryHeader,
 461   IN MEMORY_MANAGE_HEADER     *NewMemoryHeader
 462   )
 463 /*++
 464
 465 Routine Description:
 466
 467   Insert Memory Header To List
 468
 469 Arguments:
 470
 471   MemoryHeader    - MEMORY_MANAGE_HEADER
 472   NewMemoryHeader - MEMORY_MANAGE_HEADER
 473
 474 Returns:
 475
 476   VOID
 477
 478 --*/
 479 ;
 480
 481 EFI_STATUS
 482 AllocMemInMemoryBlock (
 483   IN  MEMORY_MANAGE_HEADER     *MemoryHeader,
 484   OUT VOID                     **Pool,
 485   IN  UINTN                    NumberOfMemoryUnit
 486   )
 487 /*++
 488
 489 Routine Description:
 490
 491   Alloc Memory In MemoryBlock
 492
 493 Arguments:
 494
 495   MemoryHeader        - MEMORY_MANAGE_HEADER
 496   Pool                - Place to store pointer to memory
 497   NumberOfMemoryUnit  - Number Of Memory Unit
 498
 499 Returns:
 500
 501   EFI_SUCCESS    Success
 502   EFI_NOT_FOUND  Can't find the free memory
 503
 504 --*/
 505 ;
 506
 507 BOOLEAN
 508 IsMemoryBlockEmptied (
 509   IN MEMORY_MANAGE_HEADER     *MemoryHeaderPtr
 510   )
 511 /*++
 512
 513 Routine Description:
 514
 515   Is Memory Block Emptied
 516
 517 Arguments:
 518
 519   MemoryHeaderPtr - MEMORY_MANAGE_HEADER
 520
 521 Returns:
 522
 523   TRUE    Empty
 524   FALSE   Not Empty
 525
 526 --*/
 527 ;
 528
 529 VOID
 530 DelinkMemoryBlock (
 531   IN MEMORY_MANAGE_HEADER     *FirstMemoryHeader,
 532   IN MEMORY_MANAGE_HEADER     *NeedFreeMemoryHeader
 533   )
 534 /*++
 535
 536 Routine Description:
 537
 538   Delink Memory Block
 539
 540 Arguments:
 541
 542   FirstMemoryHeader     - MEMORY_MANAGE_HEADER
 543   NeedFreeMemoryHeader  - MEMORY_MANAGE_HEADER
 544
 545 Returns:
 546
 547   VOID
 548
 549 --*/
 550 ;
 551
 552 EFI_STATUS
 553 InitialMemoryManagement (
 554   IN USB2_HC_DEV     *HcDev
 555   )
 556 /*++
 557
 558 Routine Description:
 559
 560   Initialize Memory Management
 561
 562 Arguments:
 563
 564   HcDev - USB2_HC_DEV
 565
 566 Returns:
 567
 568   EFI_SUCCESS        Success
 569   EFI_DEVICE_ERROR   Fail
 570
 571 --*/
 572 ;
 573
 574 EFI_STATUS
 575 DeinitialMemoryManagement (
 576   IN USB2_HC_DEV     *HcDev
 577   )
 578 /*++
 579
 580 Routine Description:
 581
 582   Deinitialize Memory Management
 583
 584 Arguments:
 585
 586   HcDev - USB2_HC_DEV
 587
 588 Returns:
 589
 590   EFI_SUCCESS        Success
 591   EFI_DEVICE_ERROR   Fail
 592
 593 --*/
 594 ;
 595
 596 EFI_STATUS
 597 EhciAllocatePool (
 598   IN  USB2_HC_DEV     *HcDev,
 599   OUT UINT8           **Pool,
 600   IN  UINTN           AllocSize
 601   )
 602 /*++
 603
 604 Routine Description:
 605
 606   Ehci Allocate Pool
 607
 608 Arguments:
 609
 610   HcDev     - USB2_HC_DEV
 611   Pool      - Place to store pointer to the memory buffer
 612   AllocSize - Alloc Size
 613
 614 Returns:
 615
 616   EFI_SUCCESS        Success
 617   EFI_DEVICE_ERROR   Fail
 618
 619 --*/
 620 ;
 621
 622 VOID
 623 EhciFreePool (
 624   IN USB2_HC_DEV     *HcDev,
 625   IN UINT8           *Pool,
 626   IN UINTN           AllocSize
 627   )
 628 /*++
 629
 630 Routine Description:
 631
 632   Uhci Free Pool
 633
 634 Arguments:
 635
 636   HcDev     - USB_HC_DEV
 637   Pool      - Pool to free
 638   AllocSize - Pool size
 639
 640 Returns:
 641
 642   VOID
 643
 644 --*/
 645 ;
 646
 647 //
 648 // EhciReg Functions
 649 //
 650 EFI_STATUS
 651 ReadEhcCapabiltiyReg (
 652   IN USB2_HC_DEV             *HcDev,
 653   IN UINT32                  CapabiltiyRegAddr,
 654   IN OUT UINT32              *Data
 655   )
 656 /*++
 657
 658 Routine Description:
 659
 660   Read  Ehc Capabitlity register
 661
 662 Arguments:
 663
 664   HcDev             - USB2_HC_DEV
 665   CapabiltiyRegAddr - Ehc Capability register address
 666   Data              - A pointer to data read from register
 667
 668 Returns:
 669
 670   EFI_SUCCESS        Success
 671   EFI_DEVICE_ERROR   Fail
 672
 673 --*/
 674 ;
 675
 676 EFI_STATUS
 677 ReadEhcOperationalReg (
 678   IN USB2_HC_DEV             *HcDev,
 679   IN UINT32                  OperationalRegAddr,
 680   IN OUT UINT32              *Data
 681   )
 682 /*++
 683
 684 Routine Description:
 685
 686   Read  Ehc Operation register
 687
 688 Arguments:
 689
 690   HcDev                - USB2_HC_DEV
 691   OperationalRegAddr   - Ehc Operation register address
 692   Data                 - A pointer to data read from register
 693
 694 Returns:
 695
 696   EFI_SUCCESS        Success
 697   EFI_DEVICE_ERROR   Fail
 698
 699 --*/
 700 ;
 701
 702 EFI_STATUS
 703 WriteEhcOperationalReg (
 704   IN USB2_HC_DEV             *HcDev,
 705   IN UINT32                  OperationalRegAddr,
 706   IN UINT32                  Data
 707   )
 708 /*++
 709
 710 Routine Description:
 711
 712   Write  Ehc Operation register
 713
 714 Arguments:
 715
 716   HcDev                - USB2_HC_DEV
 717   OperationalRegAddr   - Ehc Operation register address
 718   Data                 - 32bit write to register
 719
 720 Returns:
 721
 722   EFI_SUCCESS        Success
 723   EFI_DEVICE_ERROR   Fail
 724
 725 --*/
 726 ;
 727
 728 EFI_STATUS
 729 SetEhcDoorbell (
 730   IN  USB2_HC_DEV     *HcDev
 731   )
 732 /*++
 733
 734 Routine Description:
 735
 736   Set Ehc door bell bit
 737
 738 Arguments:
 739
 740   HcDev - USB2_HC_DEV
 741
 742 Returns:
 743
 744   EFI_SUCCESS       Success
 745   EFI_DEVICE_ERROR  Fail
 746
 747 --*/
 748 ;
 749
 750 EFI_STATUS
 751 SetFrameListLen (
 752   IN USB2_HC_DEV     *HcDev,
 753   IN UINTN           Length
 754   )
 755 /*++
 756
 757 Routine Description:
 758
 759   Set the length of Frame List
 760
 761 Arguments:
 762
 763   HcDev    - USB2_HC_DEV
 764   Length   - the required length of frame list
 765
 766 Returns:
 767
 768   EFI_SUCCESS            Success
 769   EFI_INVALID_PARAMETER  Invalid parameter
 770   EFI_DEVICE_ERROR       Fail
 771
 772 --*/
 773 ;
 774
 775 BOOLEAN
 776 IsFrameListProgrammable (
 777   IN  USB2_HC_DEV     *HcDev
 778   )
 779 /*++
 780
 781 Routine Description:
 782
 783   Whether frame list is programmable
 784
 785 Arguments:
 786
 787   HcDev - USB2_HC_DEV
 788
 789 Returns:
 790
 791   TRUE   Programmable
 792   FALSE  Unprogrammable
 793
 794 --*/
 795 ;
 796
 797 BOOLEAN
 798 IsPeriodicScheduleEnabled (
 799   IN  USB2_HC_DEV     *HcDev
 800   )
 801 /*++
 802
 803 Routine Description:
 804
 805   Whether periodic schedule is enabled
 806
 807 Arguments:
 808
 809   HcDev - USB2_HC_DEV
 810
 811 Returns:
 812
 813   TRUE   Enabled
 814   FALSE  Disabled
 815
 816 --*/
 817 ;
 818
 819 BOOLEAN
 820 IsAsyncScheduleEnabled (
 821   IN  USB2_HC_DEV     *HcDev
 822   )
 823 /*++
 824
 825 Routine Description:
 826
 827   Whether asynchronous schedule is enabled
 828
 829 Arguments:
 830
 831   HcDev - USB2_HC_DEV
 832
 833 Returns:
 834
 835   TRUE   Enabled
 836   FALSE  Disabled
 837
 838 --*/
 839 ;
 840
 841 BOOLEAN
 842 IsEhcPortEnabled (
 843   IN  USB2_HC_DEV     *HcDev,
 844   IN  UINT8           PortNum
 845   )
 846 /*++
 847
 848 Routine Description:
 849
 850   Whether port is enabled
 851
 852 Arguments:
 853
 854   HcDev - USB2_HC_DEV
 855
 856 Returns:
 857
 858   TRUE   Enabled
 859   FALSE  Disabled
 860
 861 --*/
 862 ;
 863
 864 BOOLEAN
 865 IsEhcReseted (
 866   IN  USB2_HC_DEV     *HcDev
 867   )
 868 /*++
 869
 870 Routine Description:
 871
 872   Whether Ehc is halted
 873
 874 Arguments:
 875
 876   HcDev - USB2_HC_DEV
 877
 878 Returns:
 879
 880   TRUE   Reseted
 881   FALSE  Unreseted
 882
 883 --*/
 884 ;
 885
 886 BOOLEAN
 887 IsEhcHalted (
 888   IN  USB2_HC_DEV     *HcDev
 889   )
 890 /*++
 891
 892 Routine Description:
 893
 894   Whether Ehc is halted
 895
 896 Arguments:
 897
 898   HcDev  - USB2_HC_DEV
 899
 900 Returns:
 901
 902   TRUE   Halted
 903   FALSE  Not halted
 904
 905 --*/
 906 ;
 907
 908 BOOLEAN
 909 IsEhcSysError (
 910   IN  USB2_HC_DEV     *HcDev
 911   )
 912 /*++
 913
 914 Routine Description:
 915
 916   Whether Ehc is system error
 917
 918 Arguments:
 919
 920   HcDev  - USB2_HC_DEV
 921
 922 Returns:
 923
 924   TRUE   System error
 925   FALSE  No system error
 926
 927 --*/
 928 ;
 929
 930 BOOLEAN
 931 IsHighSpeedDevice (
 932   IN EFI_USB2_HC_PROTOCOL *This,
 933   IN UINT8                PortNum
 934   )
 935 /*++
 936
 937 Routine Description:
 938
 939   Whether high speed device attached
 940
 941 Arguments:
 942
 943   HcDev - USB2_HC_DEV
 944
 945 Returns:
 946
 947   TRUE   High speed
 948   FALSE  Full speed
 949
 950 --*/
 951 ;
 952
 953 EFI_STATUS
 954 WaitForEhcReset (
 955   IN USB2_HC_DEV             *HcDev,
 956   IN UINTN                   Timeout
 957   )
 958 /*++
 959
 960 Routine Description:
 961
 962   wait for Ehc reset or timeout
 963
 964 Arguments:
 965
 966   HcDev   - USB2_HC_DEV
 967   Timeout - timeout threshold
 968
 969 Returns:
 970
 971   EFI_SUCCESS    Success
 972   EFI_TIMEOUT    Timeout
 973
 974 --*/
 975 ;
 976
 977 EFI_STATUS
 978 WaitForEhcHalt (
 979   IN USB2_HC_DEV             *HcDev,
 980   IN UINTN                   Timeout
 981   )
 982 /*++
 983
 984 Routine Description:
 985
 986   wait for Ehc halt or timeout
 987
 988 Arguments:
 989
 990   HcDev   - USB2_HC_DEV
 991   Timeout - timeout threshold
 992
 993 Returns:
 994
 995   EFI_SUCCESS    Success
 996   EFI_TIMEOUT    Timeout
 997
 998 --*/
 999 ;
1000
1001 EFI_STATUS
1002 WaitForEhcNotHalt (
1003   IN USB2_HC_DEV             *HcDev,
1004   IN UINTN                   Timeout
1005   )
1006 /*++
1007
1008 Routine Description:
1009
1010   wait for Ehc not halt or timeout
1011
1012 Arguments:
1013
1014   HcDev   - USB2_HC_DEV
1015   Timeout - timeout threshold
1016
1017 Returns:
1018
1019   EFI_SUCCESS    Success
1020   EFI_TIMEOUT    Timeout
1021
1022 --*/
1023 ;
1024
1025 EFI_STATUS
1026 WaitForEhcDoorbell (
1027   IN  USB2_HC_DEV            *HcDev,
1028   IN UINTN                   Timeout
1029   )
1030 /*++
1031
1032 Routine Description:
1033
1034   Wait for periodic schedule disable or timeout
1035
1036 Arguments:
1037
1038   HcDev   - USB2_HC_DEV
1039   Timeout - timeout threshold
1040
1041 Returns:
1042
1043   EFI_SUCCESS    Success
1044   EFI_TIMEOUT    Timeout
1045
1046 --*/
1047 ;
1048
1049 EFI_STATUS
1050 WaitForAsyncScheduleEnable (
1051   IN USB2_HC_DEV             *HcDev,
1052   IN UINTN                   Timeout
1053   )
1054 /*++
1055
1056 Routine Description:
1057
1058   Wait for Ehc asynchronous schedule enable or timeout
1059
1060 Arguments:
1061
1062   HcDev   - USB2_HC_DEV
1063   Timeout - timeout threshold
1064
1065 Returns:
1066
1067   EFI_SUCCESS    Success
1068   EFI_TIMEOUT    Timeout
1069
1070 --*/
1071 ;
1072
1073 EFI_STATUS
1074 WaitForAsyncScheduleDisable (
1075   IN USB2_HC_DEV             *HcDev,
1076   IN UINTN                   Timeout
1077   )
1078 /*++
1079
1080 Routine Description:
1081
1082   Wait for Ehc asynchronous schedule disable or timeout
1083
1084 Arguments:
1085
1086   HcDev   - USB2_HC_DEV
1087   Timeout - timeout threshold
1088
1089 Returns:
1090
1091   EFI_SUCCESS    Success
1092   EFI_TIMEOUT    Timeout
1093
1094 --*/
1095 ;
1096
1097 EFI_STATUS
1098 WaitForPeriodicScheduleEnable (
1099   IN USB2_HC_DEV             *HcDev,
1100   IN UINTN                   Timeout
1101   )
1102 /*++
1103
1104 Routine Description:
1105
1106   Wait for Ehc periodic schedule enable or timeout
1107
1108 Arguments:
1109
1110   HcDev   - USB2_HC_DEV
1111   Timeout - timeout threshold
1112
1113 Returns:
1114
1115   EFI_SUCCESS    Success
1116   EFI_TIMEOUT    Timeout
1117
1118 --*/
1119 ;
1120
1121 EFI_STATUS
1122 WaitForPeriodicScheduleDisable (
1123   IN USB2_HC_DEV             *HcDev,
1124   IN UINTN                   Timeout
1125   )
1126 /*++
1127
1128 Routine Description:
1129
1130   Wait for periodic schedule disable or timeout
1131
1132 Arguments:
1133
1134   HcDev   - USB2_HC_DEV
1135   Timeout - timeout threshold
1136
1137 Returns:
1138
1139   EFI_SUCCESS    Success
1140   EFI_TIMEOUT    Timeout
1141
1142 --*/
1143 ;
1144
1145 EFI_STATUS
1146 GetCapabilityLen (
1147   IN USB2_HC_DEV     *HcDev
1148   )
1149 /*++
1150
1151 Routine Description:
1152
1153   Get the length of capability register
1154
1155 Arguments:
1156
1157   HcDev - USB2_HC_DEV
1158
1159 Returns:
1160
1161   EFI_SUCCESS       Success
1162   EFI_DEVICE_ERROR  Fail
1163
1164 --*/
1165 ;
1166
1167 EFI_STATUS
1168 SetFrameListBaseAddr (
1169   IN USB2_HC_DEV     *HcDev,
1170   IN UINT32          FrameBuffer
1171   )
1172 /*++
1173
1174 Routine Description:
1175
1176   Set base address of frame list first entry
1177
1178 Arguments:
1179
1180   HcDev       - USB2_HC_DEV
1181   FrameBuffer - base address of first entry of frame list
1182
1183 Returns:
1184
1185   EFI_SUCCESS       Success
1186   EFI_DEVICE_ERROR  Fail
1187
1188 --*/
1189 ;
1190
1191 EFI_STATUS
1192 SetAsyncListAddr (
1193   IN USB2_HC_DEV        *HcDev,
1194   IN EHCI_QH_ENTITY     *QhPtr
1195   )
1196 /*++
1197
1198 Routine Description:
1199
1200   Set address of first Async schedule Qh
1201
1202 Arguments:
1203
1204   HcDev    - USB2_HC_DEV
1205   QhPtr    - A pointer to first Qh in the Async schedule
1206
1207 Returns:
1208
1209   EFI_SUCCESS       Success
1210   EFI_DEVICE_ERROR  Fail
1211
1212 --*/
1213 ;
1214
1215 EFI_STATUS
1216 SetCtrlDataStructSeg (
1217   IN USB2_HC_DEV     *HcDev
1218   )
1219 /*++
1220
1221 Routine Description:
1222
1223   Set address of first Async schedule Qh
1224
1225 Arguments:
1226
1227   HcDev    - USB2_HC_DEV
1228   QhPtr    - A pointer to first Qh in the Async schedule
1229
1230 Returns:
1231
1232   EFI_SUCCESS       Success
1233   EFI_DEVICE_ERROR  Fail
1234
1235 --*/
1236 ;
1237
1238 EFI_STATUS
1239 SetPortRoutingEhc (
1240   IN USB2_HC_DEV     *HcDev
1241   )
1242 /*++
1243
1244 Routine Description:
1245
1246   Set Ehc port routing bit
1247
1248 Arguments:
1249
1250   HcDev - USB2_HC_DEV
1251
1252 Returns:
1253
1254   EFI_SUCCESS       Success
1255   EFI_DEVICE_ERROR  Fail
1256
1257 --*/
1258 ;
1259
1260 EFI_STATUS
1261 EnablePeriodicSchedule (
1262   IN  USB2_HC_DEV     *HcDev
1263   )
1264 /*++
1265
1266 Routine Description:
1267
1268   Enable periodic schedule
1269
1270 Arguments:
1271
1272   HcDev - USB2_HC_DEV
1273
1274 Returns:
1275
1276   EFI_SUCCESS       Success
1277   EFI_DEVICE_ERROR  Fail
1278
1279 --*/
1280 ;
1281
1282 EFI_STATUS
1283 DisablePeriodicSchedule (
1284   IN  USB2_HC_DEV     *HcDev
1285   )
1286 /*++
1287
1288 Routine Description:
1289
1290   Disable periodic schedule
1291
1292 Arguments:
1293
1294   HcDev - USB2_HC_DEV
1295
1296 Returns:
1297
1298   EFI_SUCCESS       Success
1299   EFI_DEVICE_ERROR  Fail
1300
1301 --*/
1302 ;
1303
1304 EFI_STATUS
1305 EnableAsynchronousSchedule (
1306   IN  USB2_HC_DEV     *HcDev
1307   )
1308 /*++
1309
1310 Routine Description:
1311
1312   Enable asynchrounous schedule
1313
1314 Arguments:
1315
1316   HcDev - USB2_HC_DEV
1317
1318 Returns:
1319
1320   EFI_SUCCESS       Success
1321   EFI_DEVICE_ERROR  Fail
1322
1323 --*/
1324 ;
1325
1326 EFI_STATUS
1327 DisableAsynchronousSchedule (
1328   IN  USB2_HC_DEV     *HcDev
1329   )
1330 /*++
1331
1332 Routine Description:
1333
1334   Disable asynchrounous schedule
1335
1336 Arguments:
1337
1338   HcDev - USB2_HC_DEV
1339
1340 Returns:
1341
1342   EFI_SUCCESS       Success
1343   EFI_DEVICE_ERROR  Fail
1344
1345 --*/
1346 ;
1347
1348 EFI_STATUS
1349 StartScheduleExecution (
1350   IN  USB2_HC_DEV     *HcDev
1351   )
1352 /*++
1353
1354 Routine Description:
1355
1356   Start Ehc schedule execution
1357
1358 Arguments:
1359
1360   HcDev - USB2_HC_DEV
1361
1362 Returns:
1363
1364   EFI_SUCCESS       Success
1365   EFI_DEVICE_ERROR  Fail
1366
1367 --*/
1368 ;
1369
1370 EFI_STATUS
1371 ResetEhc (
1372   IN  USB2_HC_DEV     *HcDev
1373   )
1374 /*++
1375
1376 Routine Description:
1377
1378   Reset Ehc
1379
1380 Arguments:
1381
1382   HcDev - USB2_HC_DEV
1383
1384 Returns:
1385
1386   EFI_SUCCESS       Success
1387   EFI_DEVICE_ERROR  Fail
1388
1389 --*/
1390 ;
1391
1392 EFI_STATUS
1393 ClearEhcAllStatus (
1394   IN  USB2_HC_DEV     *HcDev
1395   )
1396 /*++
1397
1398 Routine Description:
1399
1400   Clear Ehc all status bits
1401
1402 Arguments:
1403
1404   HcDev - USB2_HC_DEV
1405
1406 Returns:
1407
1408   EFI_SUCCESS        Success
1409   EFI_DEVICE_ERROR   Fail
1410
1411 --*/
1412 ;
1413
1414 //
1415 // EhciSched Functions
1416 //
1417 EFI_STATUS
1418 InitialPeriodicFrameList (
1419   IN USB2_HC_DEV      *HcDev,
1420   IN UINTN            Length
1421   )
1422 /*++
1423
1424 Routine Description:
1425
1426   Initialize Periodic Schedule Frame List
1427
1428 Arguments:
1429
1430   HcDev   - USB2_HC_DEV
1431   Length  - Frame List Length
1432
1433 Returns:
1434
1435   EFI_SUCCESS        Success
1436   EFI_DEVICE_ERROR   Fail
1437
1438 --*/
1439 ;
1440
1441 VOID
1442 DeinitialPeriodicFrameList (
1443   IN  USB2_HC_DEV     *HcDev
1444   )
1445 /*++
1446
1447 Routine Description:
1448
1449   Deinitialize Periodic Schedule Frame List
1450
1451 Arguments:
1452
1453   HcDev - USB2_HC_DEV
1454
1455 Returns:
1456
1457   VOID
1458
1459 --*/
1460 ;
1461
1462 EFI_STATUS
1463 CreatePollingTimer (
1464   IN  USB2_HC_DEV      *HcDev,
1465   IN  EFI_EVENT_NOTIFY NotifyFunction
1466   )
1467 /*++
1468
1469 Routine Description:
1470
1471   Create Async Request Polling Timer
1472
1473 Arguments:
1474
1475   HcDev          - USB2_HC_DEV
1476   NotifyFunction - Timer Notify Function
1477
1478 Returns:
1479
1480   EFI_SUCCESS        Success
1481   EFI_DEVICE_ERROR   Fail
1482
1483 --*/
1484 ;
1485
1486 EFI_STATUS
1487 DestoryPollingTimer (
1488   IN  USB2_HC_DEV *HcDev
1489   )
1490 /*++
1491
1492 Routine Description:
1493
1494   Destory Async Request Polling Timer
1495
1496 Arguments:
1497
1498   HcDev - USB2_HC_DEV
1499
1500 Returns:
1501
1502   EFI_SUCCESS        Success
1503   EFI_DEVICE_ERROR   Fail
1504
1505 --*/
1506 ;
1507
1508 EFI_STATUS
1509 StartPollingTimer (
1510   IN  USB2_HC_DEV *HcDev
1511   )
1512 /*++
1513
1514 Routine Description:
1515
1516   Start Async Request Polling Timer
1517
1518 Arguments:
1519
1520   HcDev - USB2_HC_DEV
1521
1522 Returns:
1523
1524   EFI_SUCCESS        Success
1525   EFI_DEVICE_ERROR   Fail
1526
1527 --*/
1528 ;
1529
1530 EFI_STATUS
1531 StopPollingTimer (
1532   IN  USB2_HC_DEV *HcDev
1533   )
1534 /*++
1535
1536 Routine Description:
1537
1538   Stop Async Request Polling Timer
1539
1540 Arguments:
1541
1542   HcDev - USB2_HC_DEV
1543
1544 Returns:
1545
1546   EFI_SUCCESS        Success
1547   EFI_DEVICE_ERROR   Fail
1548
1549 --*/
1550 ;
1551
1552 EFI_STATUS
1553 CreateQh (
1554   IN  USB2_HC_DEV         *HcDev,
1555   IN  UINT8               DeviceAddr,
1556   IN  UINT8               Endpoint,
1557   IN  UINT8               DeviceSpeed,
1558   IN  UINTN               MaxPacketLen,
1559   OUT EHCI_QH_ENTITY      **QhPtrPtr
1560   )
1561 /*++
1562
1563 Routine Description:
1564
1565   Create Qh Structure and Pre-Initialize
1566
1567 Arguments:
1568
1569   HcDev          - USB2_HC_DEV
1570   DeviceAddr     - Address of Device
1571   Endpoint       - Endpoint Number
1572   DeviceSpeed    - Device Speed
1573   MaxPacketLen   - Max Length of one Packet
1574   QhPtrPtr       - A pointer of pointer to Qh for return
1575
1576 Returns:
1577
1578   EFI_SUCCESS       Success
1579   EFI_DEVICE_ERROR  Fail
1580
1581 --*/
1582 ;
1583
1584 EFI_STATUS
1585 CreateControlQh (
1586   IN  USB2_HC_DEV                       *HcDev,
1587   IN  UINT8                             DeviceAddr,
1588   IN  UINT8                             DeviceSpeed,
1589   IN UINTN                              MaxPacketLen,
1590   IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1591   OUT EHCI_QH_ENTITY                    **QhPtrPtr
1592   )
1593 /*++
1594
1595 Routine Description:
1596
1597   Create Qh for Control Transfer
1598
1599 Arguments:
1600
1601   HcDev         - USB2_HC_DEV
1602   DeviceAddr    - Address of Device
1603   DeviceSpeed   - Device Speed
1604   MaxPacketLen  - Max Length of one Packet
1605   Translator    - Translator Transaction for SplitX
1606   QhPtrPtr      - A pointer of pointer to Qh for return
1607
1608 Returns:
1609
1610   EFI_SUCCESS       Success
1611   EFI_DEVICE_ERROR  Fail
1612
1613 --*/
1614 ;
1615
1616 EFI_STATUS
1617 CreateBulkQh (
1618   IN  USB2_HC_DEV                         *HcDev,
1619   IN  UINT8                               DeviceAddr,
1620   IN  UINT8                               EndPointAddr,
1621   IN  UINT8                               DeviceSpeed,
1622   IN  UINT8                               DataToggle,
1623   IN  UINTN                               MaxPacketLen,
1624   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1625   OUT EHCI_QH_ENTITY                      **QhPtrPtr
1626   )
1627 /*++
1628
1629 Routine Description:
1630
1631   Create Qh for Bulk Transfer
1632
1633 Arguments:
1634
1635   HcDev         - USB2_HC_DEV
1636   DeviceAddr    - Address of Device
1637   EndPointAddr  - Address of Endpoint
1638   DeviceSpeed   - Device Speed
1639   MaxPacketLen  - Max Length of one Packet
1640   Translator    - Translator Transaction for SplitX
1641   QhPtrPtr      - A pointer of pointer to Qh for return
1642
1643 Returns:
1644
1645   EFI_SUCCESS       Success
1646   EFI_DEVICE_ERROR  Fail
1647
1648 --*/
1649 ;
1650
1651 EFI_STATUS
1652 CreateInterruptQh (
1653   IN  USB2_HC_DEV                        *HcDev,
1654   IN  UINT8                              DeviceAddr,
1655   IN  UINT8                              EndPointAddr,
1656   IN  UINT8                              DeviceSpeed,
1657   IN  UINT8                              DataToggle,
1658   IN  UINTN                              MaxPacketLen,
1659   IN  UINTN                              Interval,
1660   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1661   OUT EHCI_QH_ENTITY                     **QhPtrPtr
1662   )
1663 /*++
1664
1665 Routine Description:
1666
1667   Create Qh for Control Transfer
1668
1669 Arguments:
1670
1671   HcDev        - USB2_HC_DEV
1672   DeviceAddr   - Address of Device
1673   EndPointAddr - Address of Endpoint
1674   DeviceSpeed  - Device Speed
1675   MaxPacketLen - Max Length of one Packet
1676   Interval     - value of interval
1677   Translator   - Translator Transaction for SplitX
1678   QhPtrPtr     - A pointer of pointer to Qh for return
1679
1680 Returns:
1681
1682   EFI_SUCCESS       Success
1683   EFI_DEVICE_ERROR  Fail
1684
1685 --*/
1686 ;
1687
1688 VOID
1689 DestoryQh (
1690   IN  USB2_HC_DEV        *HcDev,
1691   IN EHCI_QH_ENTITY      *QhPtr
1692   )
1693 /*++
1694
1695 Routine Description:
1696
1697   Destory Qh Structure
1698
1699 Arguments:
1700
1701   HcDev - USB2_HC_DEV
1702   QhPtr - A pointer to Qh
1703
1704 Returns:
1705
1706   VOID
1707
1708 --*/
1709 ;
1710
1711 EFI_STATUS
1712 CreateQtd (
1713   IN  USB2_HC_DEV          *HcDev,
1714   IN  UINT8                *DataPtr,
1715   IN  UINTN                DataLen,
1716   IN  UINT8                PktId,
1717   IN  UINT8                Toggle,
1718   IN  UINT8                QtdStatus,
1719   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1720   )
1721 /*++
1722
1723 Routine Description:
1724
1725   Create Qtd Structure and Pre-Initialize it
1726
1727 Arguments:
1728
1729   HcDev       - USB2_HC_DEV
1730   DataPtr     - A pointer to user data buffer to transfer
1731   DataLen     - Length of user data to transfer
1732   PktId       - Packet Identification of this Qtd
1733   Toggle      - Data Toggle of this Qtd
1734   QtdStatus   - Default value of status of this Qtd
1735   QtdPtrPtr   - A pointer of pointer to Qtd for return
1736
1737 Returns:
1738
1739   EFI_SUCCESS            Success
1740   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1741
1742 --*/
1743 ;
1744
1745 EFI_STATUS
1746 CreateSetupQtd (
1747   IN  USB2_HC_DEV          *HcDev,
1748   IN  UINT8                *DevReqPtr,
1749   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1750   )
1751 /*++
1752
1753 Routine Description:
1754
1755   Create Qtd Structure for Setup
1756
1757 Arguments:
1758
1759   HcDev      - USB2_HC_DEV
1760   DevReqPtr  - A pointer to Device Request Data
1761   QtdPtrPtr  - A pointer of pointer to Qtd for return
1762
1763 Returns:
1764
1765   EFI_SUCCESS            Success
1766   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1767
1768 --*/
1769 ;
1770
1771 EFI_STATUS
1772 CreateDataQtd (
1773   IN  USB2_HC_DEV           *HcDev,
1774   IN  UINT8                 *DataPtr,
1775   IN  UINTN                 DataLen,
1776   IN  UINT8                 PktId,
1777   IN  UINT8                 Toggle,
1778   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1779   )
1780 /*++
1781
1782 Routine Description:
1783
1784   Create Qtd Structure for data
1785
1786 Arguments:
1787
1788   HcDev       - USB2_HC_DEV
1789   DataPtr     - A pointer to user data buffer to transfer
1790   DataLen     - Length of user data to transfer
1791   PktId       - Packet Identification of this Qtd
1792   Toggle      - Data Toggle of this Qtd
1793   QtdPtrPtr   - A pointer of pointer to Qtd for return
1794
1795 Returns:
1796
1797   EFI_SUCCESS            Success
1798   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1799
1800 --*/
1801 ;
1802
1803 EFI_STATUS
1804 CreateStatusQtd (
1805   IN  USB2_HC_DEV           *HcDev,
1806   IN  UINT8                 PktId,
1807   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1808   )
1809 /*++
1810
1811 Routine Description:
1812
1813   Create Qtd Structure for status
1814
1815 Arguments:
1816
1817   HcDev       - USB2_HC_DEV
1818   PktId       - Packet Identification of this Qtd
1819   QtdPtrPtr   - A pointer of pointer to Qtd for return
1820
1821 Returns:
1822
1823   EFI_SUCCESS            Success
1824   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1825
1826 --*/
1827 ;
1828
1829 EFI_STATUS
1830 CreateAltQtd (
1831   IN  USB2_HC_DEV           *HcDev,
1832   IN  UINT8                 PktId,
1833   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1834   )
1835 /*++
1836
1837 Routine Description:
1838
1839   Create Qtd Structure for Alternative
1840
1841 Arguments:
1842
1843   HcDev      - USB2_HC_DEV
1844   PktId      - Packet Identification of this Qtd
1845   QtdPtrPtr  - A pointer of pointer to Qtd for return
1846
1847 Returns:
1848
1849   EFI_SUCCESS            Success
1850   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1851
1852 --*/
1853 ;
1854
1855 EFI_STATUS
1856 CreateControlQtds (
1857   IN  USB2_HC_DEV                         *HcDev,
1858   IN UINT8                                DataPktId,
1859   IN UINT8                                *RequestCursor,
1860   IN UINT8                                *DataCursor,
1861   IN UINTN                                DataLen,
1862   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1863   OUT EHCI_QTD_ENTITY                     **ControlQtdsHead
1864   )
1865 /*++
1866
1867 Routine Description:
1868
1869   Create Qtds list for Control Transfer
1870
1871 Arguments:
1872
1873   HcDev           - USB2_HC_DEV
1874   DataPktId       - Packet Identification of Data Qtds
1875   RequestCursor   - A pointer to request structure buffer to transfer
1876   DataCursor      - A pointer to user data buffer to transfer
1877   DataLen         - Length of user data to transfer
1878   ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return
1879
1880 Returns:
1881
1882   EFI_SUCCESS       Success
1883   EFI_DEVICE_ERROR  Fail
1884
1885 --*/
1886 ;
1887
1888 EFI_STATUS
1889 CreateBulkOrInterruptQtds (
1890   IN  USB2_HC_DEV                          *HcDev,
1891   IN  UINT8                                PktId,
1892   IN  UINT8                                *DataCursor,
1893   IN  UINTN                                DataLen,
1894   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR   *Translator,
1895   OUT EHCI_QTD_ENTITY                      **QtdsHead
1896   )
1897 /*++
1898
1899 Routine Description:
1900
1901   Create Qtds list for Bulk or Interrupt Transfer
1902
1903 Arguments:
1904
1905   HcDev        - USB2_HC_DEV
1906   PktId        - Packet Identification of Qtds
1907   DataCursor   - A pointer to user data buffer to transfer
1908   DataLen      - Length of user data to transfer
1909   DataToggle   - Data Toggle to start
1910   Translator   - Translator Transaction for SplitX
1911   QtdsHead     - A pointer of pointer to first Qtd for control tranfer for return
1912
1913 Returns:
1914
1915   EFI_SUCCESS       Success
1916   EFI_DEVICE_ERROR  Fail
1917
1918 --*/
1919 ;
1920
1921 VOID
1922 DestoryQtds (
1923   IN USB2_HC_DEV          *HcDev,
1924   IN EHCI_QTD_ENTITY      *FirstQtdPtr
1925   )
1926 /*++
1927
1928 Routine Description:
1929
1930   Destory all Qtds in the list
1931
1932 Arguments:
1933
1934   HcDev        - USB2_HC_DEV
1935   FirstQtdPtr  - A pointer to first Qtd in the list
1936
1937 Returns:
1938
1939   VOID
1940
1941 --*/
1942 ;
1943
1944 VOID
1945 LinkQtdToQtd (
1946   IN EHCI_QTD_ENTITY     *PreQtdPtr,
1947   IN EHCI_QTD_ENTITY     *QtdPtr
1948   )
1949 /*++
1950
1951 Routine Description:
1952
1953   Link Qtds together
1954
1955 Arguments:
1956
1957   PreQtdPtr  - A pointer to pre Qtd
1958   QtdPtr     - A pointer to next Qtd
1959
1960 Returns:
1961
1962   VOID
1963
1964 --*/
1965 ;
1966
1967 VOID
1968 LinkQtdsToAltQtd (
1969   IN EHCI_QTD_ENTITY     *FirstQtdPtr,
1970   IN EHCI_QTD_ENTITY     *AltQtdPtr
1971   )
1972 /*++
1973
1974 Routine Description:
1975
1976   Link AlterQtds together
1977
1978 Arguments:
1979
1980   FirstQtdPtr - A pointer to first Qtd in the list
1981   AltQtdPtr - A pointer to alternative Qtd
1982
1983 Returns:
1984   VOID
1985
1986 --*/
1987 ;
1988
1989 VOID
1990 LinkQtdToQh (
1991   IN EHCI_QH_ENTITY      *QhPtr,
1992   IN EHCI_QTD_ENTITY     *QtdEntryPtr
1993   )
1994 /*++
1995
1996 Routine Description:
1997
1998   Link Qtds list to Qh
1999
2000 Arguments:
2001
2002   QhPtr   - A pointer to Qh
2003   QtdPtr  - A pointer to first Qtd in the list
2004
2005 Returns:
2006
2007   VOID
2008
2009 --*/
2010 ;
2011
2012 EFI_STATUS
2013 LinkQhToAsyncList (
2014   IN  USB2_HC_DEV       *HcDev,
2015   IN EHCI_QH_ENTITY     *QhPtr
2016   )
2017 /*++
2018
2019 Routine Description:
2020
2021   Link Qh to Async Schedule List
2022
2023 Arguments:
2024
2025   HcDev - USB2_HC_DEV
2026   QhPtr - A pointer to Qh
2027
2028 Returns:
2029
2030   EFI_SUCCESS       Success
2031   EFI_DEVICE_ERROR  Fail
2032
2033 --*/
2034 ;
2035
2036 EFI_STATUS
2037 UnlinkQhFromAsyncList (
2038   IN USB2_HC_DEV         *HcDev,
2039   IN EHCI_QH_ENTITY      *QhPtr
2040   )
2041 /*++
2042
2043 Routine Description:
2044
2045   Unlink Qh from Async Schedule List
2046
2047 Arguments:
2048
2049   HcDev   - USB2_HC_DEV
2050   QhPtr   - A pointer to Qh
2051
2052 Returns:
2053
2054   EFI_SUCCESS       Success
2055   EFI_DEVICE_ERROR  Fail
2056
2057 --*/
2058 ;
2059
2060 VOID
2061 LinkQhToPeriodicList (
2062   IN USB2_HC_DEV        *HcDev,
2063   IN EHCI_QH_ENTITY     *QhPtr
2064   )
2065 /*++
2066
2067 Routine Description:
2068
2069   Link Qh to Periodic Schedule List
2070
2071 Arguments:
2072
2073   HcDev   - USB2_HC_DEV
2074   QhPtr   - A pointer to Qh
2075
2076 Returns:
2077
2078   VOID
2079
2080 --*/
2081 ;
2082
2083 VOID
2084 UnlinkQhFromPeriodicList (
2085   IN USB2_HC_DEV         *HcDev,
2086   IN EHCI_QH_ENTITY      *QhPtr,
2087   IN UINTN                Interval
2088   )
2089 /*++
2090
2091 Routine Description:
2092
2093   Unlink Qh from Periodic Schedule List
2094
2095 Arguments:
2096
2097   HcDev     - USB2_HC_DEV
2098   QhPtr     - A pointer to Qh
2099   Interval  - Interval of this periodic transfer
2100
2101 Returns:
2102
2103   VOID
2104
2105 --*/
2106 ;
2107
2108 VOID
2109 LinkToAsyncReqeust (
2110   IN  USB2_HC_DEV        *HcDev,
2111   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2112   )
2113 /*++
2114
2115 Routine Description:
2116
2117   Llink AsyncRequest Entry to Async Request List
2118
2119 Arguments:
2120
2121   HcDev           - USB2_HC_DEV
2122   AsyncRequestPtr - A pointer to Async Request Entry
2123
2124 Returns:
2125
2126   VOID
2127
2128 --*/
2129 ;
2130
2131 VOID
2132 UnlinkFromAsyncReqeust (
2133   IN  USB2_HC_DEV        *HcDev,
2134   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2135   )
2136 /*++
2137
2138 Routine Description:
2139
2140   Unlink AsyncRequest Entry from Async Request List
2141
2142 Arguments:
2143
2144   HcDev           - USB2_HC_DEV
2145   AsyncRequestPtr - A pointer to Async Request Entry
2146
2147 Returns:
2148
2149   VOID
2150
2151 --*/
2152 ;
2153
2154 UINTN
2155 GetNumberOfQtd (
2156   IN EHCI_QTD_ENTITY    *FirstQtdPtr
2157   )
2158 /*++
2159
2160 Routine Description:
2161
2162   Number of Qtds in the list
2163
2164 Arguments:
2165
2166   FirstQtdPtr - A pointer to first Qtd in the list
2167
2168 Returns:
2169
2170   Number of Qtds in the list
2171
2172 --*/
2173 ;
2174
2175 UINTN
2176 GetNumberOfTransaction (
2177   IN UINTN    SizeOfData,
2178   IN UINTN    SizeOfTransaction
2179   )
2180 /*++
2181
2182 Routine Description:
2183
2184   Number of Transactions in one Qtd
2185
2186 Arguments:
2187
2188   SizeOfData           - Size of one Qtd
2189   SizeOfTransaction    - Size of one Transaction
2190
2191 Returns:
2192
2193   Number of Transactions in this Qtd
2194
2195 --*/
2196 ;
2197
2198 UINTN
2199 GetCapacityOfQtd (
2200   IN UINT8    *BufferCursor
2201   )
2202 /*++
2203
2204 Routine Description:
2205
2206   Get Capacity of Qtd
2207
2208 Arguments:
2209
2210   BufferCursor  - BufferCursor of the Qtd
2211
2212 Returns:
2213
2214   Capacity of Qtd
2215
2216 --*/
2217 ;
2218
2219 UINTN
2220 GetApproxiOfInterval (
2221   IN UINTN  Interval
2222   )
2223 /*++
2224
2225 Routine Description:
2226
2227   Get the approximate value in the 2 index sequence
2228
2229 Arguments:
2230
2231   Interval - the value of interval
2232
2233 Returns:
2234
2235   approximate value of interval in the 2 index sequence
2236
2237 --*/
2238 ;
2239
2240 EHCI_QTD_HW *
2241 GetQtdNextPointer (
2242   IN EHCI_QTD_HW *HwQtdPtr
2243   )
2244 /*++
2245
2246 Routine Description:
2247
2248   Get Qtd next pointer field
2249
2250 Arguments:
2251
2252   HwQtdPtr - A pointer to hardware Qtd structure
2253
2254 Returns:
2255
2256   A pointer to next hardware Qtd structure
2257
2258 --*/
2259 ;
2260
2261 BOOLEAN
2262 IsQtdStatusActive (
2263   IN EHCI_QTD_HW *HwQtdPtr
2264   )
2265 /*++
2266
2267 Routine Description:
2268
2269   Whether Qtd status is active or not
2270
2271 Arguments:
2272
2273   HwQtdPtr - A pointer to hardware Qtd structure
2274
2275 Returns:
2276
2277   TRUE    Active
2278   FALSE   Inactive
2279
2280 --*/
2281 ;
2282
2283 BOOLEAN
2284 IsQtdStatusHalted (
2285   IN EHCI_QTD_HW *HwQtdPtr
2286   )
2287 /*++
2288
2289 Routine Description:
2290
2291   Whether Qtd status is halted or not
2292
2293 Arguments:
2294
2295   HwQtdPtr - A pointer to hardware Qtd structure
2296
2297 Returns:
2298
2299   TRUE    Halted
2300   FALSE   Not halted
2301
2302 --*/
2303 ;
2304
2305 BOOLEAN
2306 IsQtdStatusBufferError (
2307   IN EHCI_QTD_HW *HwQtdPtr
2308   )
2309 /*++
2310
2311 Routine Description:
2312
2313   Whether Qtd status is buffer error or not
2314
2315 Arguments:
2316
2317   HwQtdPtr - A pointer to hardware Qtd structure
2318
2319 Returns:
2320
2321   TRUE    Buffer error
2322   FALSE   No buffer error
2323
2324 --*/
2325 ;
2326
2327 BOOLEAN
2328 IsQtdStatusBabbleError (
2329   IN EHCI_QTD_HW *HwQtdPtr
2330   )
2331 /*++
2332
2333 Routine Description:
2334
2335   Whether Qtd status is babble error or not
2336
2337 Arguments:
2338
2339   HwQtdPtr - A pointer to hardware Qtd structure
2340
2341 Returns:
2342
2343   TRUE    Babble error
2344   FALSE   No babble error
2345
2346 --*/
2347 ;
2348
2349 BOOLEAN
2350 IsQtdStatusTransactionError (
2351   IN EHCI_QTD_HW *HwQtdPtr
2352   )
2353 /*++
2354
2355 Routine Description:
2356
2357   Whether Qtd status is transaction error or not
2358
2359 Arguments:
2360
2361   HwQtdPtr - A pointer to hardware Qtd structure
2362
2363 Returns:
2364
2365   TRUE    Transaction error
2366   FALSE   No transaction error
2367
2368 --*/
2369 ;
2370
2371 BOOLEAN
2372 IsDataInTransfer (
2373   IN  UINT8     EndPointAddress
2374   )
2375 /*++
2376
2377 Routine Description:
2378
2379   Whether is a DataIn direction transfer
2380
2381 Arguments:
2382
2383   EndPointAddress - address of the endpoint
2384
2385 Returns:
2386
2387   TRUE    DataIn
2388   FALSE   DataOut
2389
2390 --*/
2391 ;
2392
2393 EFI_STATUS
2394 MapDataBuffer (
2395   IN  USB2_HC_DEV             *HcDev,
2396   IN  EFI_USB_DATA_DIRECTION  TransferDirection,
2397   IN  OUT VOID                *Data,
2398   IN  OUT UINTN               *DataLength,
2399   OUT UINT8                   *PktId,
2400   OUT UINT8                   **DataCursor,
2401   OUT VOID                    **DataMap
2402   )
2403 /*++
2404
2405 Routine Description:
2406
2407   Map address of user data buffer
2408
2409 Arguments:
2410
2411   HcDev             - USB2_HC_DEV
2412   TransferDirection - direction of transfer
2413   Data              - A pointer to user data buffer
2414   DataLength        - length of user data
2415   PktId             - Packte Identificaion
2416   DataCursor        - mapped address to return
2417   DataMap           - identificaion of this mapping to return
2418
2419 Returns:
2420
2421   EFI_SUCCESS        Success
2422   EFI_DEVICE_ERROR   Fail
2423
2424 --*/
2425 ;
2426
2427 EFI_STATUS
2428 MapRequestBuffer (
2429   IN  USB2_HC_DEV             *HcDev,
2430   IN  OUT VOID                *Request,
2431   OUT UINT8                   **RequestCursor,
2432   OUT VOID                    **RequestMap
2433   )
2434 /*++
2435
2436 Routine Description:
2437
2438   Map address of request structure buffer
2439
2440 Arguments:
2441
2442   HcDev           - USB2_HC_DEV
2443   Request         - A pointer to request structure
2444   RequestCursor   - Mapped address of request structure to return
2445   RequestMap      - Identificaion of this mapping to return
2446
2447 Returns:
2448
2449   EFI_SUCCESS        Success
2450   EFI_DEVICE_ERROR   Fail
2451
2452 --*/
2453 ;
2454
2455 VOID
2456 SetQtdBufferPointer (
2457   IN EHCI_QTD_HW *QtdHwPtr,
2458   IN VOID        *DataPtr,
2459   IN UINTN       DataLen
2460   )
2461 /*++
2462
2463 Routine Description:
2464
2465   Set data buffer pointers in Qtd
2466
2467 Arguments:
2468
2469   QtdHwPtr  - A pointer to Qtd hardware structure
2470   DataPtr   - A pointer to user data buffer
2471   DataLen   - Length of the user data buffer
2472
2473 Returns:
2474
2475   VOID
2476
2477 --*/
2478 ;
2479
2480 EHCI_QTD_HW *
2481 GetQtdAlternateNextPointer (
2482   IN EHCI_QTD_HW *HwQtdPtr
2483   )
2484 /*++
2485
2486 Routine Description:
2487
2488   Get Qtd alternate next pointer field
2489
2490 Arguments:
2491
2492   HwQtdPtr - A pointer to hardware Qtd structure
2493
2494 Returns:
2495
2496   A pointer to hardware alternate Qtd
2497
2498 --*/
2499 ;
2500
2501 VOID
2502 ZeroOutQhOverlay (
2503   IN EHCI_QH_ENTITY *QhPtr
2504   )
2505 /*++
2506
2507 Routine Description:
2508
2509   Zero out the fields in Qh structure
2510
2511 Arguments:
2512
2513   QhPtr - A pointer to Qh structure
2514
2515 Returns:
2516
2517   VOID
2518
2519 --*/
2520 ;
2521
2522 VOID
2523 UpdateAsyncRequestTransfer (
2524   IN EHCI_ASYNC_REQUEST *AsyncRequestPtr,
2525   IN UINT32             TransferResult,
2526   IN UINTN              ErrTDPos
2527   )
2528 /*++
2529
2530 Routine Description:
2531
2532   Update asynchronous request transfer
2533
2534 Arguments:
2535
2536   AsyncRequestPtr  - A pointer to async request
2537   TransferResult   - transfer result
2538   ErrQtdPos        - postion of error Qtd
2539
2540 Returns:
2541
2542   VOID
2543
2544 --*/
2545 ;
2546
2547
2548 EFI_STATUS
2549 DeleteAsyncRequestTransfer (
2550   IN  USB2_HC_DEV     *HcDev,
2551   IN  UINT8           DeviceAddress,
2552   IN  UINT8           EndPointAddress,
2553   OUT UINT8           *DataToggle
2554   )
2555 /*++
2556
2557 Routine Description:
2558
2559   Delete all asynchronous request transfer
2560
2561 Arguments:
2562
2563   HcDev           - USB2_HC_DEV
2564   DeviceAddress   - address of usb device
2565   EndPointAddress - address of endpoint
2566   DataToggle      - stored data toggle
2567
2568 Returns:
2569
2570   EFI_SUCCESS        Success
2571   EFI_DEVICE_ERROR   Fail
2572
2573 --*/
2574 ;
2575
2576 VOID
2577 CleanUpAllAsyncRequestTransfer (
2578   IN  USB2_HC_DEV *HcDev
2579   )
2580 /*++
2581
2582 Routine Description:
2583
2584   Clean up all asynchronous request transfer
2585
2586 Arguments:
2587
2588   HcDev - USB2_HC_DEV
2589
2590 Returns:
2591   VOID
2592
2593 --*/
2594 ;
2595
2596 EFI_STATUS
2597 ExecuteTransfer (
2598   IN  USB2_HC_DEV         *HcDev,
2599   IN BOOLEAN              IsControl,
2600   IN  EHCI_QH_ENTITY      *QhPtr,
2601   IN OUT UINTN            *ActualLen,
2602   OUT UINT8               *DataToggle,
2603   IN  UINTN               TimeOut,
2604   OUT UINT32              *TransferResult
2605   )
2606 /*++
2607
2608 Routine Description:
2609
2610   Execute Bulk or SyncInterrupt Transfer
2611
2612 Arguments:
2613
2614   HcDev            - USB2_HC_DEV
2615   IsControl        - Is control transfer or not
2616   QhPtr            - A pointer to Qh
2617   ActualLen        - Actual transfered Len
2618   DataToggle       - Data Toggle
2619   TimeOut          - TimeOut threshold
2620   TransferResult   - Transfer result
2621
2622 Returns:
2623
2624   EFI_SUCCESS        Sucess
2625   EFI_DEVICE_ERROR   Error
2626
2627 --*/
2628 ;
2629
2630 BOOLEAN
2631 CheckQtdsTransferResult (
2632   IN BOOLEAN             IsControl,
2633   IN  EHCI_QH_ENTITY     *QhPtr,
2634   OUT UINT32             *Result,
2635   OUT UINTN              *ErrQtdPos,
2636   OUT UINTN              *ActualLen
2637   )
2638 /*++
2639
2640 Routine Description:
2641
2642   Check transfer result of Qtds
2643
2644 Arguments:
2645
2646   IsControl     - Is control transfer or not
2647   QhPtr         - A pointer to Qh
2648   Result        - Transfer result
2649   ErrQtdPos     - Error TD Position
2650   ActualLen     - Actual Transfer Size
2651
2652 Returns:
2653
2654   TRUE    Qtds finished
2655   FALSE   Not finish
2656
2657 --*/
2658 ;
2659
2660 EFI_STATUS
2661 AsyncRequestMoniter (
2662   IN EFI_EVENT     Event,
2663   IN VOID          *Context
2664   )
2665 /*++
2666
2667 Routine Description:
2668
2669   Interrupt transfer periodic check handler
2670
2671 Arguments:
2672
2673   Event     - Interrupt event
2674   Context   - Pointer to USB2_HC_DEV
2675
2676 Returns:
2677
2678   EFI_SUCCESS        Success
2679   EFI_DEVICE_ERROR   Fail
2680
2681 --*/
2682 ;
2683
2684 #endif